专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06545540B1 Current mirror-embedded low-pass filter for subscriber line interface circuit applications 失效
标题翻译：电流镜面嵌入式低通滤波器，用于用户线接口电路应用
公开(公告)号：US06545540B1
公开(公告)日：2003-04-08
申请号：US09686633
申请日：2000-10-11
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H03F304
CPC分类号： H03H11/1213 , H03F3/345
摘要： A current mirror circuit incorporates a resistor-capacitor (RC) filter circuit in the base-coupling path of input and output current mirror transistors, to realize a highly integrated low pass filter current mirror architecture, that reduces implementation complexity, and complies with reduced power supply parameters of a subscriber line interface circuit. A filter resistor is connected in series between the bases of the input and output current mirror transistors. A filter capacitor is coupled between the base of the output transistor and the power supply rail. The effect of this low pass filter circuit is such that the output current is equal to the frequency content of the input current below the cut-off frequency as defined by the RC time constant of the filter.
摘要翻译：电流镜电路在输入和输出电流镜晶体管的基极耦合路径中包含电阻 - 电容（RC）滤波电路，以实现高度集成的低通滤波器电流镜架构，降低实现复杂度，并符合降低功耗提供用户线接口电路的参数。滤波电阻串联连接在输入和输出电流镜晶体管的基极之间。滤波电容器耦合在输出晶体管的基极和电源轨之间。该低通滤波器电路的效果使得输出电流等于由滤波器的RC时间常数定义的低于截止频率的输入电流的频率含量。

2. 发明授权

US06411164B1 Precision low power operational amplifier with gain invariant bandwith 有权
公开(公告)号：US06411164B1
公开(公告)日：2002-06-25
申请号：US09901265
申请日：2001-07-09
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H03F345
CPC分类号： H03F3/3066 , H03F2203/30105 , H03F2203/30138
摘要： A precision, low power operational amplifier employs a transconductance amplifier architecture to provide wide operational bandwidth at any closed looped gain, and maintain DC precision. A single ended output node/port, to which current paths of first and second current mirrors of the transconductance amplifier are coupled serves as a ‘non-inverting’ terminal. The first and second current mirrors include additional current mirror stages whose outputs are coupled to respective third and fourth auxiliary current mirrors. The outputs of the third and fourth current mirrors are coupled to an ‘inverting’ terminal. An output amplifier stage has its non-inverting input coupled to ground and its inverting input coupled to a feedback port. A gain-defining feedback resistor is coupled between the output and the feedback port of the output amplifier stage. The functionality of the operational amplifier circuit is defined by selectively connecting the feedback port of the output amplifier stage to one of the non-inverting and inverting terminals, with the other of these two terminals being unconnected or open.

3. 发明授权

US07260214B2 Programmable subscriber line circuit partitioned into high voltage interface and digital control subsections 有权
标题翻译：可编程用户线路电路分为高压接口和数字控制子部分
公开(公告)号：US07260214B2
公开(公告)日：2007-08-21
申请号：US11295901
申请日：2005-12-07
申请人： Leonel Ernesto Enriquez , Douglas Youngblood , Edward A. Berrios
发明人： Leonel Ernesto Enriquez , Douglas Youngblood , Edward A. Berrios
IPC分类号： H04M1/00 , H04M9/00 , H04M9/08
CPC分类号： H04M3/005 , H04M1/7385
摘要： A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
摘要翻译：用户线接口电路具有电池供电的高电压模拟部分，其驱动用户回路的尖端和环形线，以及混合信号（低电压和数字信号处理）部分，其监视和控制高压模拟部分。高压模拟部分的输入信号接收单元输入来自混合信号部分的语音和低电压信号和振铃信号，以应用于耦合到该环路的双模式，可编程增益，尖端/环形放大器。尖端/环形放大器输出端的读出放大器通过一个辅助放大器到一个模拟反馈监视端口，用于闭合一个回路以合成电路的输出阻抗。

4. 发明授权

US06518832B2 Mechanism for minimizing current mirror transistor base current error for low overhead voltage applications 失效
标题翻译：用于最小化低架空电压应用的电流镜晶体管基极电流误差的机制
公开(公告)号：US06518832B2
公开(公告)日：2003-02-11
申请号：US09901439
申请日：2001-07-09
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： G05F110
CPC分类号： G05F3/265
摘要： To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes a complementary polarity base current error reduction and auxiliary turn-on circuit, that provides an overhead voltage that enjoys a base-emitter diode drop improvement over the overhead voltage of a conventional circuit. Due to the base current error-reduction transistor in the circuit path from the power supply rail to the input port, the overhead voltage is improved by a base-emitter diode drop larger than the overhead voltage of the conventional circuit. In addition, it further reduces base current error.
摘要翻译：为了减轻具有有限架空电压的电流镜像电路中的基极电流误差，补偿电流镜电路包括互补极性基极电流误差减小和辅助导通电路，其提供具有基极 - 发射极二极管降压的架空电压改进了常规电路的架空电压。由于从电源轨到输入口的电路中的基极电流误差降低晶体管，通过比常规电路的架空电压大的基极 - 发射二极管压降来提高架空电压。此外，它进一步降低了基极电流误差。

5. 发明授权

US06400187B1 Precision, low-power transimpedance circuit with differential current sense inputs and single ended voltage output 失效
标题翻译：具有差分电流检测输入和单端电压输出的精密，低功耗跨阻电路
公开(公告)号：US06400187B1
公开(公告)日：2002-06-04
申请号：US09939191
申请日：2001-08-24
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H03K5153
CPC分类号： H03F3/45085 , H03F2203/45392 , H03F2203/45574 , H03F2203/45604 , H03F2203/45624 , H03F2203/45641
摘要： A transimpedance circuit adapted for use in a subscriber line interface circuit includes sense resistors installed in closed loop, negative feedback paths of respective sense amplifiers. Voltage drops across the sense resistors are applied to first and second differential coupling circuits for applying differential currents to complementary polarity inputs of an operational amplifier. The inputs of the amplifier are also coupled to a linearity compensator, that is configured to provide sufficient overhead voltages in the presence of worst case voltage swing conditions. The compensator has a differential amplifier configuration, that closes a negative feedback loop from the output of the amplifier and one of its inputs, relative to a reference voltage balancing path coupled to the amplifier's other (complementary) input. The balanced differential configuration forces corresponding terminals of a pair of load resistors coupled to the inputs of the operational amplifier to the same potential, irrespective of variations in the input currents.
摘要翻译：适用于用户线接口电路的跨阻电路包括安装在闭环的感测电阻器，各个感测放大器的负反馈路径。感测电阻器两端的电压降被施加到第一和第二差分耦合电路，以将运算放大器的互补极性输入端施加差分电流。放大器的输入也耦合到线性补偿器，其被配置为在存在最坏情况的电压摆幅条件的情况下提供足够的架空电压。补偿器具有差分放大器配置，其相对于耦合到放大器的另一（互补）输入的参考电压平衡路径，从放大器的输出端和其输入端之一闭合负反馈回路。平衡差分配置迫使一对负载电阻器的相应端子耦合到运算放大器的输入到相同的电位，而与输入电流的变化无关。

6. 发明授权

US06396331B1 Mechanism for minimizing undesirable effects of parasitic components in integrated circuits 有权
标题翻译：减少集成电路中寄生元件的不良影响的机制
公开(公告)号：US06396331B1
公开(公告)日：2002-05-28
申请号：US09686514
申请日：2000-10-11
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H03K1730
CPC分类号： H03K19/00353 , H03F1/083 , H03K19/00346
摘要： A compensation circuit for minimizing undesirable effects of parasitic components, such as a parasitic capacitance of a controlled electronic device (e.g., transistor) is coupled in parallel with the controlled electronic device in a manner that is effective to decrease the spurious AC signal-coupling of the parasitic component, such that the amplitude of the unwanted AC noise voltage across the load element is very significantly reduced, or effectively minimized. The parametric values of the transfer function of the electronic device in the by-pass compensation circuit are such as to attenuate the unwanted AC noise voltage across the load, by a factor that approximates the amplitude of the spurious signal, thereby effectively minimizing its unwanted contribution to the load voltage. As a non-limiting example, the invention may be employed to significantly reduce the effects of spurious AC signals induced in and transported over DC supply rails used to power a communication circuit, such as a subscriber line interface circuit.
摘要翻译：用于最小化诸如受控电子器件（例如，晶体管）的寄生电容的寄生元件的不期望的影响的补偿电路与受控电子器件并联耦合，以有效地降低寄生电子器件的杂散AC信号耦合寄生分量，使得负载元件两端的不需要的AC噪声电压的幅度非常显着地减小或有效地最小化。旁路补偿电路中的电子器件的传递函数的参数值可以通过近似于杂散信号的幅度的因素来衰减跨负载的不必要的AC噪声电压，从而有效地最小化其不必要的贡献到负载电压。作为非限制性示例，本发明可以用于显着地减少在用于为诸如用户线路接口电路的通信电路供电的直流电源轨上感应和传输的寄生交流信号的影响。

7. 再颁专利

USRE42123E1 Programmable subscriber line circuit partitioned into high voltage interface and digital control subsections 有权
标题翻译：可编程用户线路电路分为高压接口和数字控制子部分
公开(公告)号：USRE42123E1
公开(公告)日：2011-02-08
申请号：US12169457
申请日：2008-07-08
申请人： Leonel Ernesto Enriquez , Douglas Lawton Youngblood , Edward Berrios
发明人： Leonel Ernesto Enriquez , Douglas Lawton Youngblood , Edward Berrios
IPC分类号： H04M1/00 , H04M9/00
CPC分类号： H04M3/005 , H04M1/7385
摘要： A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
摘要翻译：用户线接口电路具有电池供电的高电压模拟部分，其驱动用户回路的尖端和环形线，以及混合信号（低电压和数字信号处理）部分，其监视和控制高压模拟部分。高压模拟部分的输入信号接收单元输入来自混合信号部分的语音和低电压信号和振铃信号，以应用于耦合到该环路的双模式，可编程增益，尖端/环形放大器。尖端/环形放大器输出端的读出放大器通过一个辅助放大器到一个模拟反馈监视端口，用于闭合一个回路以合成电路的输出阻抗。

8. 发明授权

US06829354B1 Biasing arrangement for optimizing DC feed characteristics for subscriber line interface circuit 失效
标题翻译：用于线路接口电路优化直流馈电特性的偏置布置
公开(公告)号：US06829354B1
公开(公告)日：2004-12-07
申请号：US09686926
申请日：2000-10-11
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H04M100
CPC分类号： H04M19/001
摘要： A subscriber line interface circuit (SLIC) drive arrangement controllably adjusts DC biasing and overhead voltage characteristics for wireline pair that is optimized for each mode of operation of the SLIC. Respective tip and ring DC drive voltages supplied by tip and ring drive amplifiers are controlled so that the differential DC voltage across the wireline pair has a first constant value during on-hook mode, in which DC loop current may vary between zero and a first DC loop current threshold value associated with a transition from on-hook mode toward off-hook mode. During a transition between on-hook mode and off-hook mode, the tip and ring DC drive voltages are controlled so as to vary the differential DC drive voltage in proportion to monitored DC loop current. During off-hook mode, the differential DC voltage is set at a second fixed value. If an upper DC loop current threshold is reached during off-hook mode, the differential DC voltage is sharply reduced from its second constant value.
摘要翻译：用户线路接口电路（SLIC）驱动装置可控制地调整针对SLIC的每种操作模式优化的有线线对的直流偏置和架空电压特性。控制尖端和环形驱动放大器提供的尖端和环形DC驱动电压，使得在挂线模式下，有线对上的差分直流电压具有第一个恒定值，其中直流回路电流可以在零和第一直流之间变化与从挂机模式向摘机模式转换相关联的回路电流阈值。在挂机模式和摘机模式之间的转换期间，控制尖端和环形直流驱动电压，以便与所监视的直流回路电流成比例地改变差动直流驱动电压。在摘机模式下，差分直流电压设定为第二固定值。如果在摘机模式下达到上限直流回路电流阈值，则差分直流电压从其第二个常数值急剧减小。

9. 发明授权

US06504927B1 Mechanism for measuring resistance of telephone subscriber line and generating measurement as pulse width of periodic waveform 有权
标题翻译：用于测量电话用户线电阻并产生测量作为周期波形脉冲宽度的机制
公开(公告)号：US06504927B1
公开(公告)日：2003-01-07
申请号：US09686517
申请日：2000-10-11
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： H04M100
CPC分类号： H04M1/76
摘要： A periodic waveform-based wireline measurement circuit derives a voltage that is very precisely proportional to the differential voltage across a wireline pair, and uses this voltage to modulate the width of a periodic waveform, such as one derived from a ringing signal. This periodic waveform can be interfaced in an asynchronous manner with digital processing components, such as a DSP codec, to provide for automatic compensation for the resistance of the phone line.
摘要翻译：基于周期性波形的有线测量电路导出与电缆对上的差分电压非常精确成比例的电压，并且使用该电压来调制诸如从振铃信号导出的周期波形的宽度。该周期性波形可以与诸如DSP编解码器的数字处理组件以异步方式接口，以提供对电话线路的电阻的自动补偿。

10. 发明授权

US06407621B1 Mechanism for generating precision user-programmable parameters in analog integrated circuit 有权
标题翻译：在模拟集成电路中生成精密用户可编程参数的机制
公开(公告)号：US06407621B1
公开(公告)日：2002-06-18
申请号：US09686515
申请日：2000-10-11
申请人： Leonel Ernesto Enriquez
发明人： Leonel Ernesto Enriquez
IPC分类号： G05F302
CPC分类号： G05F3/225
摘要： A circuit generates a programmable output current in proportion to the ratio of a precision reference voltage and a programming resistor, such that internal parameters of the circuit are effectively independent of the programming resistor. A bandgap voltage device supplies a reference current proportional to temperature through the collector-emitter path of a reference transistor through a reference resistor. The reference resistor has the same geometry as the internal bandgap's resistor and has a value such that the sum of the base-emitter voltage drop across the reference transistor and the voltage across the reference resistor due to the precision current equals the bandgap voltage. The base of the reference transistor is coupled to the emitter of an output transistor and to a programming resistor. The base of the output transistor is coupled to the collector of the reference transistor, while the collector of the output transistor is coupled to an output terminal, from which a programmed current is supplied based on the value of the programming resistor. The loop equations are such that the output current is definable as the ratio of the bandgap voltage to the value of the programming resistor, and is not affected by base-emitter voltage drops of the reference and output transistors.
摘要翻译：电路与精密参考电压和编程电阻的比例成比例地产生可编程输出电流，使得电路的内部参数与编程电阻器无关。带隙电压器件通过参考电阻提供与参考晶体管的集电极 - 发射极通路成比例的参考电流。参考电阻器具有与内部带隙电阻器相同的几何形状，并且具有这样的值，使得由于精密电流而导致参考晶体管的基极 - 发射极电压降与参考电阻器两端的电压等于带隙电压。参考晶体管的基极耦合到输出晶体管的发射极和编程电阻器。输出晶体管的基极耦合到参考晶体管的集电极，而输出晶体管的集电极耦合到输出端子，基于编程电阻器的值从其提供编程电流。循环方程式使得输出电流可定义为带隙电压与编程电阻器的值的比值，并且不受参考和输出晶体管的基极 - 发射极电压降的影响。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式