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1. 发明授权

US4991169A Real-time digital signal processing relative to multiple digital communication channels 失效
标题翻译：相对于多个数字通信通道的实时数字信号处理
公开(公告)号：US4991169A
公开(公告)日：1991-02-05
申请号：US227832
申请日：1988-08-02
申请人： Gordon T. Davis , Michael G. Ho Lung , Baiju D. Mandalia , Roland J. Millas , Oscar E. Ortega , Rafael J. Picon , Loran R. Queen , Richard H. Robinson , William R. Robinson, Jr. , Leo A. Sharp, Jr. , Jan W. van den Berg
发明人： Gordon T. Davis , Michael G. Ho Lung , Baiju D. Mandalia , Roland J. Millas , Oscar E. Ortega , Rafael J. Picon , Loran R. Queen , Richard H. Robinson , William R. Robinson, Jr. , Leo A. Sharp, Jr. , Jan W. van den Berg
IPC分类号： H04M11/06 , H04J3/12
CPC分类号： H04J3/12 , H04Q2213/13034 , H04Q2213/1309 , H04Q2213/13103 , H04Q2213/13107 , H04Q2213/13174 , H04Q2213/13199 , H04Q2213/13213 , H04Q2213/13215 , H04Q2213/13292 , H04Q2213/13377 , H04Q2213/13396
摘要： A dual digital signal processor (DSP) provides real time links between multiple time division channels of a digital carrier system (e.g. T-1) and a host data processor. Operating only on digital signals, internally and at its interfaces to the carrier and host systems, the DSP exchanges data and control signalling information with the carrier system and data and control information with the most processor, converting the data in passage to different digital forms. At the interface to the carrier system, signals are received and transmitted in a form adapted to diverse terminal equipment of users remotely linked to the carrier system via the switched public network. At the host interface, signals are transferred and received in a form suited to the data process requirements of the host system (e.g. data bytes directly representing alphanumeric characters). Thus, the DSP acts as the equivalent of multiple different types of modems in performing required conversions. The DSP may also perform processing services in order to reduce the processing burden on the host system (e.g. parity checking of data, detection of specific character functions in data or specific tones in audio signals, selective routing of voice to host storage for voice mail applications, etc.).

2. 发明授权

US4514823A Apparatus and method for extending a parallel channel to a serial I/O device 失效
标题翻译：将并行通道扩展到串行I / O设备的装置和方法
公开(公告)号：US4514823A
公开(公告)日：1985-04-30
申请号：US339525
申请日：1982-01-15
申请人： Richard N. Mendelson , Douglas M. O'Neal , Leo A. Sharp, Jr.
发明人： Richard N. Mendelson , Douglas M. O'Neal , Leo A. Sharp, Jr.
IPC分类号： G06F13/38 , G06F13/12 , G06F13/28 , G06F9/00
CPC分类号： G06F13/282 , G06F13/122
摘要： There is disclosed apparatus and a method for extending a parallel channel of the host processor over a serial link to a remote peripheral device. The apparatus includes a microprocessor within I/O channel extension logic which responds to either instructions or data from a host processor. The instructions are of the type commanding the I/O device to perform a specific operation and the data is provided in response to requests for data from the I/O device. The channel extension logic is coupled to the host processor's channel and thus is able to obtain data from the host storage by cycle steal techniques. Within the channel extension logic are means to serialize the information and transmit it in a serial manner over the link. The microprocessor within the channel extension logic creates a frame, including a control byte, which identifies the type of information followed by the data, which frame is then communicated over the serial link to the I/O device. The I/O device also includes a microprocessor and associated logic which responds to the frames communicated by the channel extension logic and generates a frame consisting of a control byte identifying the information type and associated data which is then communicated back over the serial link to the channel extension logic to request action by the channel extension logic or indicate completion of the operation. The I/O device may, for instance, request data be obtained from or stored in the host memory by cycle steal techniques and thereby utilize the features of the host and host channel despite only being coupled thereto by a serial link.
摘要翻译：公开了通过串行链路将主处理器的并行通道扩展到远程外围设备的装置和方法。该装置包括在I / O通道扩展逻辑中的微处理器，其响应来自主机处理器的指令或数据。指令是指令I / O设备执行特定操作的类型，并且响应于来自I / O设备的数据请求而提供数据。信道扩展逻辑耦合到主处理器的信道，因此能够通过循环窃取技术从主机存储获得数据。在信道扩展逻辑中是用于串行化信息并通过链路以串行方式发送信息的手段。信道扩展逻辑内的微处理器创建一个帧，包括一个控制字节，该控制字节标识随后数据的信息类型，然后通过串行链路将该帧传送到I / O设备。 I / O设备还包括微处理器和相关联的逻辑，其响应由信道扩展逻辑传送的帧，并产生由标识信息类型和相关联的数据的控制字节组成的帧，然后通过串行链路将其传送回到信道扩展逻辑，以通过信道扩展逻辑请求动作或指示操作的完成。例如，I / O设备可以通过循环窃取技术从主机存储器中获取或存储数据，从而利用主机和主机信道的特征，尽管仅通过串行链路耦合到主机和主机信道。

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