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1. 发明申请

US20100267431A1 RECESSIBLE INTEGRATED POCKET CLIP FOR MOBILE DEVICES AND THE LIKE 有权
标题翻译：用于移动设备和类似的可接收的集成口袋夹
公开(公告)号：US20100267431A1
公开(公告)日：2010-10-21
申请号：US12743035
申请日：2007-12-18
申请人： Roger A. Fratti , Douglas Lopata , Lawrence A. Rigge
发明人： Roger A. Fratti , Douglas Lopata , Lawrence A. Rigge
IPC分类号： H04M1/00
CPC分类号： A45F5/02 , A45F5/021 , A45F2200/0516 , H01H3/16
摘要： In one embodiment, an apparatus comprising a housing and a fastener, such as a clip (101, 201) for fastening the apparatus (100, 200) to an article of clothing. The housing (102, 202) has a recess (103, 203) formed therein, such that at least a portion of the fastener is adapted to fit within the recess. The fastener is adapted to travel slidably within the recess (103, 203) between a first position in which the fastener enables the apparatus (100, 200) to be fastened to an external object and a second position in which the fastener is stowed away.
摘要翻译：在一个实施例中，一种包括壳体和紧固件的装置，例如用于将装置（100,200）紧固到衣物上的夹子（101,201）。壳体（102,202）具有形成在其中的凹部（103,203），使得紧固件的至少一部分适于装配在凹部内。紧固件适于在第一位置和第二位置之间在凹部（103,203）内滑动地移动，第一位置中紧固件使得装置（100,200）能够紧固到外部物体，并且第二位置中紧固件被收起。

2. 发明授权

US07162212B2 System and method for obscuring unwanted ambient noise and handset and central office equipment incorporating the same 有权
标题翻译：用于遮蔽不需要的环境噪声的系统和方法，以及包含该环境噪声的手机和中央办公设备
公开(公告)号：US07162212B2
公开(公告)日：2007-01-09
申请号：US10667624
申请日：2003-09-22
申请人： David J. Bennetts , Lawrence A. Rigge , Richard P. Verney
发明人： David J. Bennetts , Lawrence A. Rigge , Richard P. Verney
IPC分类号： H04B1/04
CPC分类号： H04B1/123
摘要： A system for, and method of, obscuring ambient noise. In one embodiment, the system includes: (1) a background sound generator, (2) a mixer coupled to the background sound generator and (3) a user interface, coupled to the mixer, that, upon a user command, causes the mixer to mix an output of the background sound generator with a transmitted signal. The background sound may be music, white noise, colored noise, out-of-phase ambient noise, simulated alternative ambient noise or any other suitable background sound. The system may be associated with a wireless handset, a wireline handset, central office equipment or any other suitable location or equipment.
摘要翻译：一种遮蔽环境噪声的系统和方法。在一个实施例中，该系统包括：（1）背景声音发生器，（2）耦合到背景声音发生器的混合器和（3）耦合到混合器的用户接口，根据用户命令，将背景声音发生器的输出与发送的信号混合。背景声音可能是音乐，白噪声，彩色噪声，异相环境噪声，模拟的替代环境噪声或任何其他合适的背景声音。该系统可以与无线手机，有线手机，中心局设备或任何其它合适的位置或设备相关联。

3. 发明授权

US08374661B2 Recessible integrated pocket clip for mobile devices and the like 有权
标题翻译：用于移动设备的隐形综合口袋夹等
公开(公告)号：US08374661B2
公开(公告)日：2013-02-12
申请号：US12743035
申请日：2007-12-18
申请人： Roger A. Fratti , Douglas D. Lopata , Lawrence A. Rigge
发明人： Roger A. Fratti , Douglas D. Lopata , Lawrence A. Rigge
IPC分类号： H04M1/00
CPC分类号： A45F5/02 , A45F5/021 , A45F2200/0516 , H01H3/16
摘要： In one embodiment, an apparatus comprising a housing and a fastener, such as a clip (101, 201) for fastening the apparatus (100, 200) to an article of clothing. The housing (102, 202) has a recess (103, 203) formed therein, such that at least a portion of the fastener is adapted to fit within the recess. The fastener is adapted to travel slidably within the recess (103, 203) between a first position in which the fastener enables the apparatus (100, 200) to be fastened to an external object and a second position in which the fastener is stowed away.
摘要翻译：在一个实施例中，一种包括壳体和紧固件的装置，例如用于将装置（100,200）紧固到衣物上的夹子（101,201）。壳体（102,202）具有形成在其中的凹部（103,203），使得紧固件的至少一部分适于装配在凹部内。紧固件适于在第一位置和第二位置之间在凹部（103,203）内滑动地移动，第一位置中紧固件使得装置（100,200）能够紧固到外部物体，并且第二位置中紧固件被收起。

4. 发明申请

US20120239719A1 Floating-Point Addition Acceleration 审中-公开
标题翻译：浮点加法
公开(公告)号：US20120239719A1
公开(公告)日：2012-09-20
申请号：US13487307
申请日：2012-06-04
申请人： Lawrence A. Rigge
发明人： Lawrence A. Rigge
IPC分类号： G06F7/42
CPC分类号： G06F7/485 , G06F7/49936
摘要： Embodiments of the present invention generate a normalized floating-point sum from at least two floating-point addends. The mantissa of an un-normalized floating-point sum is generated. A pointer is generated which indicates the location of the left-most significant digit (LSD) in the mantissa of the un-normalized floating-point sum. A plurality of possible values for the exponent of the normalized floating-point sum are generated, in parallel with each other and in parallel with the mantissa addition, based on a common exponent value (e.g., the largest of the two addends' exponent values). Based on the LSD pointer, one of the possible values is selected as the exponent of the normalized floating-point sum. The mantissa of the un-normalized floating-point sum is normalized to yield the mantissa of the normalized floating-point sum. By generating the possible exponent values in parallel, embodiments of the present invention can result in significant time savings over prior-art methods.
摘要翻译：本发明的实施例从至少两个浮点加数生成归一化浮点和。生成非归一化浮点和的尾数。产生指示非标准化浮点和的尾数中最高有效位（LSD）的位置的指针。基于公共指数值（例如，两个加数指数值中的最大值），生成与归一化浮点和指数相关并且与尾数相加并行的多个可能值，。基于LSD指针，选择其中一个可能的值作为归一化浮点和的指数。非归一化浮点和的尾数被归一化以产生标准化浮点和的尾数。通过平行地产生可能的指数值，与现有技术方法相比，本发明的实施例可以导致显着的时间节省。

5. 发明申请

US20080074187A1 Multi-gain amplifier with input impedance control 失效
公开(公告)号：US20080074187A1
公开(公告)日：2008-03-27
申请号：US11526855
申请日：2006-09-25
申请人： Jinghong Chen , Shaorui Li , Lawrence A. Rigge
发明人： Jinghong Chen , Shaorui Li , Lawrence A. Rigge
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F1/56 , H03F3/19 , H03F2200/222 , H03F2200/294 , H03F2200/451 , H03F2203/45316 , H03F2203/45332 , H03F2203/45506 , H03F2203/45616 , H03F2203/45704 , H03F2203/45726 , H03H7/38
摘要： In one embodiment, an amplifier circuit has at least one branch and current-source circuitry providing a tail current to the branch, which has at least one load tank, at least one input transistor coupled to the load tank, and variable-impedance circuitry coupled between an input node of the amplifier circuit and the gate of the input transistor. The transconductance of the input transistor can be altered to achieve two or more different gain settings for the amplifier circuit. The variable-impedance circuitry can be controlled to contribute any one of at least two different levels of impedance to the overall input impedance of the amplifier circuit. If the transconductance of the input transistor is reduced, then the variable-impedance circuitry can increase the level of impedance contributed to the overall input impedance of the amplifier circuit such that the overall input impedance of the amplifier circuit remains substantially unchanged.

6. 发明申请

US20100023574A1 FLOATING-POINT ADDITION ACCELERATION 失效
标题翻译：浮点加速
公开(公告)号：US20100023574A1
公开(公告)日：2010-01-28
申请号：US12180759
申请日：2008-07-28
申请人： Lawrence A. Rigge
发明人： Lawrence A. Rigge
IPC分类号： G06F7/42
CPC分类号： G06F7/485 , G06F7/49936
摘要： Embodiments of the present invention generate a normalized floating-point sum from at least two floating-point addends. The mantissa of an un-normalized floating-point sum is generated. A pointer is generated which indicates the location of the left-most significant digit (LSD) in the mantissa of the un-normalized floating-point sum. A plurality of possible values for the exponent of the normalized floating-point sum are generated, in parallel with each other and in parallel with the mantissa addition, based on a common exponent value (e.g., the largest of the two addends' exponent values). Based on the LSD pointer, one of the possible values is selected as the exponent of the normalized floating-point sum. The mantissa of the un-normalized floating-point sum is normalized to yield the mantissa of the normalized floating-point sum. By generating the possible exponent values in parallel, embodiments of the present invention can result in significant time savings over prior-art methods.
摘要翻译：本发明的实施例从至少两个浮点加数生成归一化浮点和。生成非归一化浮点和的尾数。产生指示非标准化浮点和的尾数中最高有效位（LSD）的位置的指针。基于公共指数值（例如，两个加数指数值中的最大值），生成与归一化浮点和指数相关并且与尾数相加并行的多个可能值，。基于LSD指针，选择其中一个可能的值作为归一化浮点和的指数。非归一化浮点和的尾数被归一化以产生标准化浮点和的尾数。通过平行地产生可能的指数值，与现有技术方法相比，本发明的实施例可以导致显着的时间节省。

7. 发明授权

US06985718B2 Charge meter system and method of compiling utilization fees 有权
标题翻译：充电仪系统及使用费编制方法
公开(公告)号：US06985718B2
公开(公告)日：2006-01-10
申请号：US10464932
申请日：2003-06-19
申请人： Norman Goris , Lawrence A. Rigge , Wolfgang Scheit
发明人： Norman Goris , Lawrence A. Rigge , Wolfgang Scheit
IPC分类号： H04M11/00
CPC分类号： H04W4/24 , H04L12/14 , H04L12/1414 , H04L12/1421 , H04L12/1485 , H04W8/18
摘要： A charge meter system and method of compiling utilization fees associated with a data transmission in a packet switched communications network. In one embodiment, the charge meter system includes a counter that counts a number of data packets associated with the data transmission and a charge rate subsystem that obtains a charge rate associated with the data transmission. The charge meter system also includes a calculation subsystem that calculates utilization fees based on the number of data packets and the charge rate of the data transmission. The charge meter system further includes an indication subsystem that provides the utilization fees to a user via user equipment participating in the data transmission.
摘要翻译：一种计费系统和方法，用于编译与分组交换通信网络中的数据传输相关的利用费用。在一个实施例中，计费器系统包括对与数据传输相关联的数据分组进行计数的计数器以及获得与数据传输相关联的计费费率的计费率子系统。计费系统还包括计算子系统，该计算子系统根据数据包的数量和数据传输的收费率来计算利用费用。计费系统还包括通过参与数据传输的用户设备向用户提供使用费的指示子系统。

8. 发明授权

US08214416B2 Floating-point addition acceleration 失效
标题翻译：浮点加法
公开(公告)号：US08214416B2
公开(公告)日：2012-07-03
申请号：US12180759
申请日：2008-07-28
申请人： Lawrence A. Rigge
发明人： Lawrence A. Rigge
IPC分类号： G06F7/42
CPC分类号： G06F7/485 , G06F7/49936
摘要： Embodiments of the present invention generate a normalized floating-point sum from at least two floating-point addends. The mantissa of an un-normalized floating-point sum is generated. A pointer is generated which indicates the location of the left-most significant digit (LSD) in the mantissa of the un-normalized floating-point sum. A plurality of possible values for the exponent of the normalized floating-point sum are generated, in parallel with each other and in parallel with the mantissa addition, based on a common exponent value (e.g., the largest of the two addends' exponent values). Based on the LSD pointer, one of the possible values is selected as the exponent of the normalized floating-point sum. The mantissa of the un-normalized floating-point sum is normalized to yield the mantissa of the normalized floating-point sum. By generating the possible exponent values in parallel, embodiments of the present invention can result in significant time savings over prior-art methods.
摘要翻译：本发明的实施例从至少两个浮点加数生成归一化浮点和。生成非归一化浮点和的尾数。产生指示非标准化浮点和的尾数中最高有效位（LSD）的位置的指针。基于公共指数值（例如，两个加数指数值中的最大值），生成与归一化浮点和指数相关并且与尾数相加并行的多个可能值，。基于LSD指针，选择其中一个可能的值作为归一化浮点和的指数。非归一化浮点和的尾数被归一化以产生标准化浮点和的尾数。通过平行地产生可能的指数值，与现有技术方法相比，本发明的实施例可以导致显着的时间节省。

9. 发明授权

US07382189B2 Multi-gain amplifier with input impedance control 失效
标题翻译：具有输入阻抗控制的多增益放大器
公开(公告)号：US07382189B2
公开(公告)日：2008-06-03
申请号：US11526855
申请日：2006-09-25
申请人： Jinghong Chen , Shaorui Li , Lawrence A. Rigge
发明人： Jinghong Chen , Shaorui Li , Lawrence A. Rigge
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F1/56 , H03F3/19 , H03F2200/222 , H03F2200/294 , H03F2200/451 , H03F2203/45316 , H03F2203/45332 , H03F2203/45506 , H03F2203/45616 , H03F2203/45704 , H03F2203/45726 , H03H7/38
摘要： In one embodiment, an amplifier circuit has at least one branch and current-source circuitry providing a tail current to the branch, which has at least one load tank, at least one input transistor coupled to the load tank, and variable-impedance circuitry coupled between an input node of the amplifier circuit and the gate of the input transistor. The transconductance of the input transistor can be altered to achieve two or more different gain settings for the amplifier circuit. The variable-impedance circuitry can be controlled to contribute any one of at least two different levels of impedance to the overall input impedance of the amplifier circuit. If the transconductance of the input transistor is reduced, then the variable-impedance circuitry can increase the level of impedance contributed to the overall input impedance of the amplifier circuit such that the overall input impedance of the amplifier circuit remains substantially unchanged.
摘要翻译：在一个实施例中，放大器电路具有至少一个分支和电流源电路，其向分支提供尾电流，该分支具有至少一个负载箱，耦合到负载箱的至少一个输入晶体管和耦合到可变阻抗电路在放大器电路的输入节点和输入晶体管的栅极之间。可以改变输入晶体管的跨导以实现放大器电路的两个或多个不同的增益设置。可控制可变阻抗电路可以对放大器电路的整个输入阻抗提供至少两个不同等级的阻抗中的任何一个。如果输入晶体管的跨导减小，则可变阻抗电路可以增加对放大器电路的总体输入阻抗贡献的阻抗水平，使得放大器电路的总体输入阻抗基本上保持不变。

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