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1. 发明申请

US20160189665A1 DISPLAY CONTROLLER AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES INCLUDING THE SAME 有权
标题翻译：显示控制器和包括其的半导体集成电路器件
公开(公告)号：US20160189665A1
公开(公告)日：2016-06-30
申请号：US14984365
申请日：2015-12-30
申请人： Kyoung Man Kim , Sung Chul Yoon , Xiangyu Meng
发明人： Kyoung Man Kim , Sung Chul Yoon , Xiangyu Meng
IPC分类号： G09G5/00 , G06T1/20 , G09G5/377
CPC分类号： G09G5/003 , G09G5/14 , G09G5/377 , G09G2340/10 , G09G2340/12 , G09G2340/125 , G09G2358/00 , G09G2370/04 , G09G2370/16
摘要： A display controller includes a first register set by an open operating system, a second register set by a secure operating system, a first data input circuit configured to read normal data according to set information in the first register, a second data input circuit configured to read secure data according to set information in the second register, and a data processor configured to blend and output the normal data with the secure data to display the secure data over the normal data.
摘要翻译：显示控制器包括由开放操作系统设置的第一寄存器，由安全操作系统设置的第二寄存器，被配置为根据第一寄存器中的设置信息读取正常数据的第一数据输入电路;第二数据输入电路，根据第二寄存器中的设置信息读取安全数据，以及数据处理器，被配置为将正常数据与安全数据进行混合并输出，以在正常数据上显示安全数据。

2. 发明申请

US20160063668A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20160063668A1
公开(公告)日：2016-03-03
申请号：US14744068
申请日：2015-06-19
申请人： KYOUNG-MAN KIM
发明人： KYOUNG-MAN KIM
IPC分类号： G06T1/60
摘要： A semiconductor device includes; a first memory that stores first and second layer image data portions used to generate first and second frame images on a display device, a second memory that stores a change map, a display controller that generates positional information associated with an image data portion in response to the change map, and an interface that receives image data and positional information and generates a command for updating the image data.
摘要翻译：一种半导体器件包括：存储用于在显示装置上生成第一和第二帧图像的第一和第二图像数据部分的第一存储器，存储变化图的第二存储器，响应于图像数据部分生成与图像数据部分相关联的位置信息的显示控制器变更图和接收图像数据和位置信息并生成用于更新图像数据的命令的接口。

3. 发明申请

US20160055830A1 HOST AND MULTI-DISPLAY SYSTEM INCLUDING THE SAME 审中-公开
标题翻译：主机和多显示系统，包括它们
公开(公告)号：US20160055830A1
公开(公告)日：2016-02-25
申请号：US14713080
申请日：2015-05-15
申请人： BYUNG TAK LEE , KYOUNG MAN KIM , JONG HO ROH
发明人： BYUNG TAK LEE , KYOUNG MAN KIM , JONG HO ROH
IPC分类号： G09G5/18 , G09G5/00 , G06F3/14
CPC分类号： G09G5/18 , G06F3/1431 , G06F3/1446 , G09G5/006 , G09G2340/0435 , G09G2370/042
摘要： A system on chip (SoC) for transmitting data packets to a display driver integrated circuit (IC) controlling a plurality of displays is provided. The SoC includes a first register, and a central processing unit (CPU) configured to set first values in the first register to adjust a frame rate of each of the displays. A tearing effect (TE) signal detection circuit is configured to detect a TE signal output from the display driver IC. A data transmission circuit is configured to generate a plurality of frame rate adjustment signals using the detected TE signal and the first values and to control transmission timings of the data packets transmitted to the displays using the frame rate adjustment signals.
摘要翻译：提供了一种用于将数据分组发送到控制多个显示器的显示驱动器集成电路（IC）的片上系统（SoC）。 SoC包括第一寄存器和配置为设置第一寄存器中的第一值以调整每个显示器的帧速率的中央处理单元（CPU）。撕裂效应（TE）信号检测电路被配置为检测从显示驱动器IC输出的TE信号。数据发送电路被配置为使用检测到的TE信号和第一值来生成多个帧速率调整信号，并且使用帧速率调整信号来控制发送到显示器的数据分组的发送定时。

4. 发明申请

US20070036254A1 Timing generator and methods thereof 有权
标题翻译：定时发生器及其方法
公开(公告)号：US20070036254A1
公开(公告)日：2007-02-15
申请号：US11500337
申请日：2006-08-08
申请人： Kyoung-Man Kim
发明人： Kyoung-Man Kim
IPC分类号： H04L7/00
CPC分类号： H04B1/40
摘要： A timing generator and methods thereof are provided. In a first example method, a timing control signal may be produced by generating a base clock signal and a higher delay resolution clock signal, a clock cycle of the higher delay resolution signal being less than a clock cycle of the base clock signal. A first control word output signal may be generated by synchronizing a control word with the base clock signal. A second control word output signal may be generated by synchronizing the first control word output signal with the higher delay resolution clock signal and generating at least one additional control word output signal based on the second control word output signal and the higher delay resolution clock signal, the first, second and at least one additional control word output signal each having different delay resolutions. In a second example method, a timing control signal may be produced by generating a plurality of control word output signals, each of the plurality of control word output signals having a different delay resolution and selecting one of the plurality of control word output signals based on a delay resolution of the selected control word output signal, the delay resolution of the selected control word output signal better suited for interaction with an external device than delay resolutions of other of the plurality of control word output signals. A timing generator may be configured to perform either of the above-described first and second example methods.
摘要翻译：提供了定时发生器及其方法。在第一示例性方法中，可以通过产生基本时钟信号和较高延迟分辨率时钟信号来产生定时控制信号，较高延迟分辨率信号的时钟周期小于基本时钟信号的时钟周期。可以通过使控制字与基本时钟信号同步来产生第一控制字输出信号。可以通过使第一控制字输出信号与较高延迟分辨率时钟信号同步并基于第二控制字输出信号和较高延迟分辨率时钟信号产生至少一个附加控制字输出信号来产生第二控制字输出信号，每个具有不同延迟分辨率的第一，第二和至少一个附加控制字输出信号。在第二示例性方法中，可以通过产生多个控制字输出信号来产生定时控制信号，所述多个控制字输出信号中的每一个具有不同的延迟分辨率，并且基于所选择的控制字输出信号的延迟分辨率，所选择的控制字输出信号的延迟分辨率比多个控制字输出信号中的另一个的延迟分辨率更适合于与外部装置的交互。定时发生器可以被配置为执行上述第一和第二示例方法中的任一个。

5. 发明授权

US10733694B2 Semiconductor device for processing image data in layers for display by a display device 有权
公开(公告)号：US10733694B2
公开(公告)日：2020-08-04
申请号：US14744068
申请日：2015-06-19
申请人： Kyoung-Man Kim
发明人： Kyoung-Man Kim
IPC分类号： G06T1/60 , G09G5/393
摘要： A semiconductor device includes; a first memory that stores first and second layer image data portions used to generate first and second frame images on a display device, a second memory that stores a change map, a display controller that generates positional information associated with an image data portion in response to the change map, and an interface that receives image data and positional information and generates a command for updating the image data.

6. 发明授权

US10008182B2 System-on-chip (SoC) devices, display drivers and SoC systems including the same 有权
公开(公告)号：US10008182B2
公开(公告)日：2018-06-26
申请号：US14850270
申请日：2015-09-10
申请人： Jong-Hyup Lee , Kyoung-Man Kim
发明人： Jong-Hyup Lee , Kyoung-Man Kim
IPC分类号： G09G5/12 , G09G5/39 , G09G3/36 , G09G3/20 , G09G5/18 , G09G5/00 , G09G5/393 , G09G5/36
CPC分类号： G09G5/12 , G09G3/2096 , G09G3/3648 , G09G3/3685 , G09G5/006 , G09G5/18 , G09G5/363 , G09G5/39 , G09G5/393 , G09G2330/021 , G09G2330/022 , G09G2360/18
摘要： A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.

7. 发明申请

US20120075262A1 UNDER-RUN COMPENSATION CIRCUIT, METHOD THEREOF, AND APPARATUSES HAVING THE SAME 审中-公开
标题翻译：欠压补偿电路及其方法及具有该功能的装置
公开(公告)号：US20120075262A1
公开(公告)日：2012-03-29
申请号：US13206704
申请日：2011-08-10
申请人： Kyoung Man Kim , Jong Ho Roh , Jae Sop Kong
发明人： Kyoung Man Kim , Jong Ho Roh , Jae Sop Kong
IPC分类号： G09G5/00
CPC分类号： G09G5/363
摘要： An under-run compensation circuit is provided. The under-run compensation circuit is configured to receive a clock signal, data, and an under-run detection signal that indicates whether or not an under-run is occurring. The under-run compensation circuit is further configured to output the clock signal and the data when receiving the under-run detection signal that indicates that an under-run is not occurring. The under-run compensation circuit is additionally configured to output the clock signal and dummy data when receiving the under- run detection signal that indicates that an under-run is occurring.
摘要翻译：提供欠运行补偿电路。欠运行补偿电路被配置为接收指示是否发生欠运行的时钟信号，数据和欠运行检测信号。欠运行补偿电路还被配置为当接收到指示未发生欠运行的欠运行检测信号时输出时钟信号和数据。欠运行补偿电路还被配置为当接收到指示发生欠运行的欠运行检测信号时输出时钟信号和伪数据。

8. 发明申请

US20160078587A1 SYSTEM-ON-CHIP (SOC) DEVICES, DISPLAY DRIVERS AND SOC SYSTEMS INCLUDING THE SAME 有权
标题翻译：系统芯片（SOC）设备，显示器驱动器和SOC系统，包括它们
公开(公告)号：US20160078587A1
公开(公告)日：2016-03-17
申请号：US14850270
申请日：2015-09-10
申请人： Jong-Hyup LEE , Kyoung-Man KIM
发明人： Jong-Hyup LEE , Kyoung-Man KIM
IPC分类号： G06T1/60 , G09G5/12 , G09G5/18 , G09G5/36 , G09G5/39 , G09G3/36
CPC分类号： G09G5/12 , G09G3/2096 , G09G3/3648 , G09G3/3685 , G09G5/006 , G09G5/18 , G09G5/363 , G09G5/39 , G09G5/393 , G09G2330/021 , G09G2330/022 , G09G2360/18
摘要： A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.
摘要翻译：片上系统（SoC）装置包括：显示控制器，被配置为接收触发信号，并且基于触发信号输出图像数据; 以及被配置为接收第一中断的收发器。在第一模式中，显示控制器被配置为与触发信号的脉冲同步地输出图像数据。在与第一模式不同的第二模式中，显示控制器被配置为仅在接收到第一中断之后与包括在触发信号中的脉冲同步地输出图像数据。

9. 发明授权

US08737732B2 Image processing device 有权
标题翻译：图像处理装置
公开(公告)号：US08737732B2
公开(公告)日：2014-05-27
申请号：US13361325
申请日：2012-01-30
申请人： Kyoung-Man Kim , Jong-Ho Roh
发明人： Kyoung-Man Kim , Jong-Ho Roh
IPC分类号： G06K9/00
CPC分类号： G06T5/009
摘要： An image processing device includes a first image enhancer and a second image enhancer. The first image enhancer receives first image data and generates first image enhancement information by analyzing the first image data. The second image enhancer receives second image data and generates second image enhancement information by analyzing the second image data. The first image enhancer converts the first image data into first enhanced image data based on the first image enhancement information and the second image enhancement information. The second image enhancer converts the second image data into second enhanced image data based on the first image enhancement information and the second image enhancement information.
摘要翻译：图像处理装置包括第一图像增强器和第二图像增强器。第一图像增强器接收第一图像数据，并通过分析第一图像数据来生成第一图像增强信息。第二图像增强器接收第二图像数据，并通过分析第二图像数据产生第二图像增强信息。第一图像增强器基于第一图像增强信息和第二图像增强信息将第一图像数据转换为第一增强图像数据。第二图像增强器基于第一图像增强信息和第二图像增强信息将第二图像数据转换为第二增强图像数据。

10. 发明申请

US20120194512A1 THREE-DIMENSIONAL IMAGE DATA DISPLAY CONTROLLER AND THREE-DIMENSIONAL IMAGE DATA DISPLAY SYSTEM 审中-公开
标题翻译：三维图像数据显示控制器和三维图像数据显示系统
公开(公告)号：US20120194512A1
公开(公告)日：2012-08-02
申请号：US13348198
申请日：2012-01-11
申请人： Kyoung-Man Kim , Jong-Ho Roh , Jong-Jin Lee
发明人： Kyoung-Man Kim , Jong-Ho Roh , Jong-Jin Lee
IPC分类号： G06T15/00
CPC分类号： G06T15/503 , H04N13/161 , H04N13/305 , H04N13/31 , H04N13/324 , H04N13/337 , H04N13/341 , H04N13/398
摘要： A display controller can include a blending coefficient storing unit and an image mixing unit. The blending coefficient storing unit can store blending coefficients. The image mixing unit can receive left-eye image data and right-eye image data, and generate three-dimensional image data by performing a blending operation on the left-eye image data and the right-eye image data using the blending coefficients stored in the blending coefficient storing unit.
摘要翻译：显示控制器可以包括混合系数存储单元和图像混合单元。混合系数存储单元可以存储混合系数。图像混合单元可以接收左眼图像数据和右眼图像数据，并且通过使用存储在左眼图像数据和右眼图像数据中的混合系数对左眼图像数据和右眼图像数据执行混合操作来生成三维图像数据混合系数存储单元。

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