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1. 发明授权

US09093150B2 Multi-chip packaged integrated circuit with flash memory and slave memory controller 有权
标题翻译：具有闪存和从属存储器控制器的多芯片封装集成电路
公开(公告)号：US09093150B2
公开(公告)日：2015-07-28
申请号：US14016224
申请日：2013-09-03
申请人： Vijay Karamcheti , Kumar Ganapathy
发明人： Vijay Karamcheti , Kumar Ganapathy
IPC分类号： G11C16/04 , G06F12/06 , G06F17/30 , G06F12/02
CPC分类号： G11C16/0408 , G06F7/78 , G06F12/0207 , G06F12/0246 , G06F12/0607 , G06F17/30477 , G06F2212/7201 , G06F2212/7208 , G11C16/06 , Y02D10/13
摘要： A multi-chip packaged integrated circuit part for mounting to a printed circuit board of a memory module. The multi-chip packaged integrated circuit part comprises an integrated circuit package including a slave memory controller (SMC) die; and pairs of a spacer under the slave memory controller die, and a flash memory die under the spacer. In each pair, the flash memory die may be larger than the spacer so that an opening is provided into a perimeter of the flash memory die to allow electrical connections to be made. A plurality of conductors may be used to electrically couple the slave memory controller die and the flash memory die to one or more pads of a pin-out of the integrated circuit package.
摘要翻译：一种用于安装到存储器模块的印刷电路板的多芯片封装集成电路部件。多芯片封装集成电路部分包括集成电路封装，其包括从存储器控制器（SMC）管芯; 以及在从存储器控制器管芯之下的间隔物对，以及在间隔件下的闪存管芯。在每对中，闪存芯片可以大于间隔件，使得开口设置在闪存芯片的周边中，以允许进行电连接。可以使用多个导体来将从存储器控制器管芯和闪存管芯电耦合到集成电路封装的引脚输出的一个或多个焊盘。

2. 发明申请

US20150032940A1 METHODS OF MANAGING POWER IN NETWORK COMPUTER SYSTEMS 有权
标题翻译：网络计算机系统管理功率的方法
公开(公告)号：US20150032940A1
公开(公告)日：2015-01-29
申请号：US13952567
申请日：2013-07-26
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy
IPC分类号： G06F12/02
CPC分类号： G06F1/329 , G06F1/3209 , G06F1/3287 , G06F3/061 , G06F3/0625 , G06F3/0638 , G06F3/0653 , G06F3/0674 , G06F3/0689 , G06F9/5094 , Y02D10/154 , Y02D10/171 , Y02D10/22 , Y02D10/24
摘要： In one embodiment of the invention, a memory apparatus is disclosed. The memory apparatus includes a memory array, a block read/write controller, and a random access read memory controller. The memory array is block read/write accessible and random read accessible. The block read/write controller is coupled between the memory array and an external interconnect. The block read/write controller performs block read/write operations upon the memory array to access blocks of consecutive memory locations therein. The random access read memory controller is coupled between the memory array and the external interconnect in parallel with the block read/write access controller. The random access read memory controller performs random read memory operations upon the memory array to access random memory locations therein.
摘要翻译：在本发明的一个实施例中，公开了一种存储装置。存储装置包括存储器阵列，块读/写控制器和随机存取读存储器控制器。存储器阵列是块读/写可访问和随机读取可访问的。块读/写控制器耦合在存储器阵列和外部互连之间。块读/写控制器对存储器阵列执行块读/写操作，以访问其中的连续存储单元的块。随机访问读存储器控制器与块读/写访问控制器并行地耦合在存储器阵列和外部互连之间。随机存取读取存储器控制器对存储器阵列执行随机读取存储器操作以访问其中的随机存储器位置。

3. 发明授权

US08555002B2 Asymmetric memory migration in hybrid main memory 有权
标题翻译：混合主存储器中的非对称存储器迁移
公开(公告)号：US08555002B2
公开(公告)日：2013-10-08
申请号：US13443086
申请日：2012-04-10
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
IPC分类号： G06F13/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.
摘要翻译：通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

4. 发明申请

US20130138872A1 APPARATUS WITH A MEMORY CONTROLLER CONFIGURED TO CONTROL ACCESS TO RANDOMLY ACCESSIBLE NON-VOLATILE MEMORY 有权
标题翻译：配有记忆控制器的设备，用于控制访问随机访问的非易失性存储器
公开(公告)号：US20130138872A1
公开(公告)日：2013-05-30
申请号：US13747455
申请日：2013-01-22
申请人： Vijay Karamcheti , Kumar Ganapathy , Kenneth Alan Okin , Rajesh Parekh
发明人： Vijay Karamcheti , Kumar Ganapathy , Kenneth Alan Okin , Rajesh Parekh
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0638 , G06F13/12 , G06F13/1657 , G06F13/1694 , G06F2212/25 , G06F2212/7203 , G11C7/1006 , G11C7/1072 , Y02D10/14
摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
摘要翻译：一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控制器，多个非易失型存储器集成电路耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。

5. 发明授权

US08417873B1 Random read and read/write block accessible memory 有权
标题翻译：随机读取和读取/写入可访问存储器
公开(公告)号：US08417873B1
公开(公告)日：2013-04-09
申请号：US12490914
申请日：2009-06-24
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F12/0866 , G06F13/1694 , G06F2212/211
摘要： In one embodiment of the invention, a memory apparatus is disclosed. The memory apparatus includes a memory array, a block read/write controller, and a random access read memory controller. The memory array is block read/write accessible and random read accessible. The block read/write controller is coupled between the memory array and an external interconnect. The block read/write controller performs block read/write operations upon the memory array to access blocks of consecutive memory locations therein. The random access read memory controller is coupled between the memory array and the external interconnect in parallel with the block read/write access controller. The random access read memory controller performs random read memory operations upon the memory array to access random memory locations therein.
摘要翻译：在本发明的一个实施例中，公开了一种存储装置。存储装置包括存储器阵列，块读/写控制器和随机存取读存储器控制器。存储器阵列是块读/写可访问和随机读取可访问的。块读/写控制器耦合在存储器阵列和外部互连之间。块读/写控制器对存储器阵列执行块读/写操作，以访问其中的连续存储单元的块。随机访问读存储器控制器与块读/写访问控制器并行地耦合在存储器阵列和外部互连之间。随机存取读取存储器控制器对存储器阵列执行随机读取存储器操作以访问其中的随机存储器位置。

6. 发明授权

US08370548B2 Methods of assembly of a computer system with randomly accessible non-volatile memory 有权
标题翻译：具有随机访问的非易失性存储器的计算机系统的组装方法
公开(公告)号：US08370548B2
公开(公告)日：2013-02-05
申请号：US12832921
申请日：2010-07-08
申请人： Vijay Karamcheti , Kumar Ganapathy , Kenneth Alan Okin , Rajesh Parekh
发明人： Vijay Karamcheti , Kumar Ganapathy , Kenneth Alan Okin , Rajesh Parekh
IPC分类号： G06F13/12
CPC分类号： G06F13/1657 , Y02D10/14
摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
摘要翻译：一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控制器，多个非易失型存储器集成电路耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。

7. 发明授权

US08205061B2 Seamless application access to hybrid main memory 有权
标题翻译：无缝应用访问混合主存
公开(公告)号：US08205061B2
公开(公告)日：2012-06-19
申请号：US13048012
申请日：2011-03-15
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
IPC分类号： G06F13/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.
摘要翻译：接收来自应用程序的命令以访问与映射到主存储器的一个或多个虚拟地址相关联的数据结构。识别具有映射到对称存储器组件的组成地址的数据结构的虚拟地址的第一子集以及具有映射到非对称存储器组件的组成地址的数据结构的虚拟地址的第二子集。访问与来自第一物理地址的虚拟地址相关联的数据和与来自第二物理地址的虚拟地址相关联的数据。与对称和非对称存储器组件相关联的数据被应用程序访问，而不向应用程序提供在对称存储器组件或非对称存储器组件内是否访问数据的指示。

8. 发明申请

US20110173371A1 WRITING TO ASYMMETRIC MEMORY 有权
标题翻译：写入不对称记忆
公开(公告)号：US20110173371A1
公开(公告)日：2011-07-14
申请号：US13053371
申请日：2011-03-22
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
IPC分类号： G06F12/10 , G06F12/08
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymmetric memory component. The symmetric memory component within the main memory of the computer system is configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component during the writing of that address. The asymmetric memory component is configured to enable block write operations in which writing to an address within a region of the asymmetric memory component affects the availability of other addresses within the region of the asymmetric memory component during the block write operations involving the address.
摘要翻译：存储器控制器写入与驻留在计算机系统内的主存储器的非对称存储器组件内的数据相关联的虚拟地址，并且具有对称存储器组件，同时保留驻留在非对称存储器组件内的邻近其他数据。计算机系统的主存储器内的对称存储器组件被配置为实现随机存取写入操作，其中写入对称存储器组件的块内的地址而不影响对称存储器组件的块内的其他地址的可用性写这个地址。非对称存储器组件被配置为启用块写入操作，其中对非对称存储器组件的区域内的地址的写入在涉及地址的块写入操作期间影响非对称存储器组件的区域内的其他地址的可用性。

9. 发明申请

US20100325383A1 ASYMMETRIC MEMORY MIGRATION IN HYBRID MAIN MEMORY 有权
标题翻译：混合主存储器中的不对称存储器迁移
公开(公告)号：US20100325383A1
公开(公告)日：2010-12-23
申请号：US12853135
申请日：2010-08-09
申请人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
发明人： Vijay Karamcheti , Kenneth A. Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.
摘要翻译：通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

10. 发明授权

US07774556B2 Asymmetric memory migration in hybrid main memory 有权
标题翻译：混合主存储器中的非对称存储器迁移
公开(公告)号：US07774556B2
公开(公告)日：2010-08-10
申请号：US11935224
申请日：2007-11-05
申请人： Vijay Karamcheti , Kenneth Alan Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
发明人： Vijay Karamcheti , Kenneth Alan Okin , Kumar Ganapathy , Ashish Singhai , Rajesh Parekh
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.
摘要翻译：通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。

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