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1. 发明申请

US20130013892A1 HIERARCHICAL MULTI-CORE PROCESSOR, MULTI-CORE PROCESSOR SYSTEM, AND COMPUTER PRODUCT 审中-公开
标题翻译：分层多核处理器，多核处理器系统和计算机产品
公开(公告)号：US20130013892A1
公开(公告)日：2013-01-10
申请号：US13614330
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F9/30
CPC分类号： G06F15/17393
摘要： A hierarchical multi-core processor includes a core group for each hierarchy of a hierarchy group constituting a series of communication functions divided according to communication protocol, where a first core group of a given hierarchy among the hierarchy group is connected to a second core group of another hierarchy constituting a first communication function to be executed following a second communication function of the given hierarchy.
摘要翻译：分级多核处理器包括构成根据通信协议划分的一系列通信功能的层级组的每个层级的核心组，其中层级组中给定层级的第一核心组连接到第二核心组构成在所述给定层次的第二通信功能之后执行的第一通信功能的另一层次。

2. 发明授权

US08548451B2 Information processing system, apparatus, and method 有权
标题翻译：信息处理系统，装置和方法
公开(公告)号：US08548451B2
公开(公告)日：2013-10-01
申请号：US13251388
申请日：2011-10-03
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
IPC分类号： H04W4/02
CPC分类号： H04W4/023 , H04W64/00
摘要： An information processing system includes a first apparatus including a position information transmission unit to transmit information on the position of the first apparatus; and a second apparatus including, a position information acquisition unit to acquire a position of the second apparatus; a position information receiving unit to receive the information on the position of the first apparatus; a relative-position information acquisition unit to acquire relative-position information of the second and the first apparatus on the basis of the information on the position of the second and the first apparatus; and a control unit to control a coupling mode of the second and the first apparatus on the basis of the relative-position information.
摘要翻译：信息处理系统包括：第一装置，包括位置信息发送单元，用于发送关于第一装置的位置的信息; 以及第二装置，包括：位置信息获取单元，用于获取所述第二装置的位置; 位置信息接收单元，用于接收关于所述第一装置的位置的信息; 相对位置信息获取单元，基于关于第二和第一装置的位置的信息来获取第二和第一装置的相对位置信息; 以及控制单元，其基于相对位置信息来控制第二和第一装置的耦合模式。

3. 发明申请

US20130013835A1 MULTICORE PROCESSOR SYSTEM, COMPUTER PRODUCT, AND CONTROL METHOD 有权
标题翻译：多重处理器系统，计算机产品和控制方法
公开(公告)号：US20130013835A1
公开(公告)日：2013-01-10
申请号：US13614097
申请日：2012-09-13
申请人： Koji KURIHARA , Koichiro Yamashita , Kiyoshi Miyazaki , Hitoshi Ikeda
发明人： Koji KURIHARA , Koichiro Yamashita , Kiyoshi Miyazaki , Hitoshi Ikeda
IPC分类号： G06F13/18
CPC分类号： G06F9/526 , G06F9/5016 , G06F13/1652
摘要： A multicore processor system includes a processor configured to detect any among a switching process and an assignment process of applications in a multicore processor; acquire upon detecting any among the switching process and the assignment process, a priority level concerning execution of each application assigned to each core of the multicore processor and number of accesses of a shared resource shared by the multicore processor; determine an access ratio of an application whose priority level is highest to each of application remaining after excluding the application whose priority level is highest, among the assigned applications, by comparing the number of accesses by each remaining application and the number of accesses by the application whose priority level is highest; notify an arbiter circuit of the determined access ratios; and arbitrate using the arbiter circuit, the access of the shared resource by the multicore processor, based on the access ratios.
摘要翻译：多核处理器系统包括被配置为检测多核处理器中的应用的切换过程和分配过程中的任何一个的处理器; 在检测到切换过程和分配过程中的任何一个时获取关于分配给多核处理器的每个核心的每个应用的执行的优先级以及由多核处理器共享的共享资源的访问次数; 通过比较每个剩余应用程序的访问次数和应用程序的访问次数，在分配的应用程序中排除优先级最高的应用程序之后，优先级最高的应用程序的优先级最高的应用程序的访问比率优先级最高; 通知仲裁电路确定的访问比率; 并且基于访问比率仲裁使用仲裁器电路，由多核处理器访问共享资源。

4. 发明申请

US20130007490A1 MULTICORE PROCESSOR SYSTEM, POWER CONTROL METHOD, AND COMPUTER PRODUCT 审中-公开
标题翻译：多重处理器系统，功率控制方法和计算机产品
公开(公告)号：US20130007490A1
公开(公告)日：2013-01-03
申请号：US13608001
申请日：2012-09-10
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F1/32 , G06F15/76
CPC分类号： G06F9/4893 , G06F1/3203 , G06F1/3243 , G06F9/5094 , Y02D10/152 , Y02D10/22 , Y02D10/24
摘要： A multicore processor system having multiple cores, includes processors configured to measure bandwidth of a network; compare the measured bandwidth and a given threshold; determine among the cores and based on an obtained comparison result, a core adjustment number by which the number of cores executing a given process related to data communicated through the network is adjusted; calculate the number of executing cores after adjustment by the core adjustment number and based on the number of cores executing the given process before the adjustment and the determined core adjustment number; specify a core executing the given process among the cores and based on the calculated number of executing cores after the adjustment; and distribute the communicated data to the specified core executing the given process.
摘要翻译：具有多个核心的多核处理器系统包括被配置为测量网络带宽的处理器; 比较测量带宽和给定阈值; 在核心之间确定并且基于获得的比较结果，调整与执行通过网络传送的数据相关的给定处理的核的数量的核心调整数; 通过核心调整号码计算调整后的执行核心数量，并根据在调整前执行给定进程的核心数量和确定的核心调整号码; 在核心之间指定执行给定进程的核心，并且基于在调整之后计算的执行核心数量; 并将传送的数据分发到执行给定进程的指定核心。

5. 发明申请

US20120088485A1 INFORMATION PROCESSING SYSTEM, APPARATUS, AND METHOD 有权
标题翻译：信息处理系统，装置和方法
公开(公告)号：US20120088485A1
公开(公告)日：2012-04-12
申请号：US13251388
申请日：2011-10-03
申请人： Koichiro YAMASHITA , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
发明人： Koichiro YAMASHITA , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
IPC分类号： H04W4/02
CPC分类号： H04W4/023 , H04W64/00
摘要： An information processing system includes a first apparatus including a position information transmission unit to transmit information on the position of the first apparatus; and a second apparatus including, a position information acquisition unit to acquire a position of the second apparatus; a position information receiving unit to receive the information on the position of the first apparatus; a relative-position information acquisition unit to acquire relative-position information of the second and the first apparatus on the basis of the information on the position of the second and the first apparatus; and a control unit to control a coupling mode of the second and the first apparatus on the basis of the relative-position information.
摘要翻译：信息处理系统包括：第一装置，包括位置信息发送单元，用于发送关于第一装置的位置的信息; 以及第二装置，包括：位置信息获取单元，用于获取所述第二装置的位置; 位置信息接收单元，用于接收关于所述第一装置的位置的信息; 相对位置信息获取单元，基于关于第二和第一装置的位置的信息来获取第二和第一装置的相对位置信息; 以及控制单元，其基于相对位置信息来控制第二和第一装置的耦合模式。

6. 发明申请

US20080082850A1 Method and apparatus for monitoring power failure 失效
标题翻译：监控电源故障的方法和装置
公开(公告)号：US20080082850A1
公开(公告)日：2008-04-03
申请号：US11783053
申请日：2007-04-05
申请人： Hiroshi Otsuka , Koji Kurihara , Kazunori Kawabe
发明人： Hiroshi Otsuka , Koji Kurihara , Kazunori Kawabe
IPC分类号： G06F11/30
CPC分类号： G06F11/30
摘要： A status notification register storing a state of a function executing section is arranged for each function executing section. The function executing section includes at least one circuit for performing a predetermined function. By determining one of two values set in the status notification register, a power failure occurring in a functional unit is identified and an initial setting process is performed to an identified location when power is restored.
摘要翻译：为每个功能执行部分布置存储功能执行部分的状态的状态通知寄存器。功能执行部分包括用于执行预定功能的至少一个电路。通过确定在状态通知寄存器中设置的两个值中的一个，识别在功能单元中发生的电源故障，并且在电源恢复时对识别的位置执行初始设置处理。

7. 发明授权

US09092273B2 Multicore processor system, computer product, and control method 有权
标题翻译：多核处理器系统，计算机产品和控制方法
公开(公告)号：US09092273B2
公开(公告)日：2015-07-28
申请号：US13614097
申请日：2012-09-13
申请人： Koji Kurihara , Koichiro Yamashita , Kiyoshi Miyazaki , Hitoshi Ikeda
发明人： Koji Kurihara , Koichiro Yamashita , Kiyoshi Miyazaki , Hitoshi Ikeda
IPC分类号： G06F9/52 , G06F13/16 , G06F9/50
CPC分类号： G06F9/526 , G06F9/5016 , G06F13/1652
摘要： A multicore processor system includes a processor configured to detect any among a switching process and an assignment process of applications in a multicore processor; acquire upon detecting any among the switching process and the assignment process, a priority level concerning execution of each application assigned to each core of the multicore processor and number of accesses of a shared resource shared by the multicore processor; determine an access ratio of an application whose priority level is highest to each of application remaining after excluding the application whose priority level is highest, among the assigned applications, by comparing the number of accesses by each remaining application and the number of accesses by the application whose priority level is highest; notify an arbiter circuit of the determined access ratios; and arbitrate using the arbiter circuit, the access of the shared resource by the multicore processor, based on the access ratios.
摘要翻译：多核处理器系统包括被配置为检测多核处理器中的应用的切换过程和分配过程中的任何一个的处理器; 在检测到切换过程和分配过程中的任何一个时获取关于分配给多核处理器的每个核心的每个应用的执行的优先级以及由多核处理器共享的共享资源的访问次数; 通过比较每个剩余应用程序的访问次数和应用程序的访问次数，在分配的应用程序中排除优先级最高的应用程序之后，优先级最高的应用程序的优先级最高的应用程序的访问比率优先级最高; 通知仲裁电路确定的访问比率; 并且基于访问比率仲裁使用仲裁器电路，由多核处理器访问共享资源。

8. 发明授权

US4530864A Porous ceramic structure 失效
标题翻译：多孔陶瓷结构
公开(公告)号：US4530864A
公开(公告)日：1985-07-23
申请号：US645106
申请日：1984-08-28
申请人： Masuo Sugie , Koji Kurihara , Yoshiro Aiba , Nobiru Komatsu , Haruo Ootuka , Kaoru Nishikido
发明人： Masuo Sugie , Koji Kurihara , Yoshiro Aiba , Nobiru Komatsu , Haruo Ootuka , Kaoru Nishikido
IPC分类号： C21C7/072 , B22D1/00 , C21C5/48 , C22B9/05 , B32B1/00 , B32B3/26 , B32B5/32
CPC分类号： C22B9/05 , B22D1/005 , B29L2023/00 , Y10T428/131
摘要： A porous ceramic structure adapted in a molten metal container in a way such that the structure pierces the wall of the container for introducing a gas thereinto. The structure comprises a main body made of a porous ceramic material and having a recession on the side adjacent to the outer surface of the container and a sub-body made of a porous ceramic material fitted in the recession of the main body. This ceramic structure enables the operator to make timely judgment for its replacement with new one before it breaks down to cause leakage of molten metal from its container.
摘要翻译：一种多孔陶瓷结构，其以熔融金属容器的方式使其结构穿透容器的壁以引入气体。该结构包括由多孔陶瓷材料制成的主体，并且在与容器的外表面相邻的一侧具有凹陷，以及由安装在主体的凹部中的多孔陶瓷材料制成的子体。这种陶瓷结构使得操作者能够在发生故障之前及时对其进行更换作出判断，以使熔融金属从容器中泄漏。

9. 发明申请

US20130007765A1 SOFTWARE CONTROL DEVICE, SOFTWARE CONTROL METHOD, AND COMPUTER PRODUCT 审中-公开
标题翻译：软件控制装置，软件控制方法和计算机产品
公开(公告)号：US20130007765A1
公开(公告)日：2013-01-03
申请号：US13608019
申请日：2012-09-10
申请人： Koichiro YAMASHITA , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
发明人： Koichiro YAMASHITA , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F2209/485
摘要： A software control device includes a processor configured to determine whether starting software and running software are accessing the same common resource; and control the running software to be temporarily suspended upon determining that the starting software and the running software are accessing the same common resource.
摘要翻译：软件控制装置包括：处理器，被配置为确定启动软件和运行的软件是否正在访问相同的公共资源; 并且在确定起始软件和正在运行的软件正在访问相同的公共资源时，控制运行的软件被暂时中止。

10. 发明授权

US07676693B2 Method and apparatus for monitoring power failure 失效
标题翻译：监控电源故障的方法和装置
公开(公告)号：US07676693B2
公开(公告)日：2010-03-09
申请号：US11783053
申请日：2007-04-05
申请人： Hiroshi Otsuka , Koji Kurihara , Kazunori Kawabe
发明人： Hiroshi Otsuka , Koji Kurihara , Kazunori Kawabe
IPC分类号： G06F11/00
CPC分类号： G06F11/30
摘要： A status notification register storing a state of a function executing section is arranged for each function executing section. The function executing section includes at least one circuit for performing a predetermined function. By determining one of two values set in the status notification register, a power failure occurring in a functional unit is identified and an initial setting process is performed to an identified location when power is restored.
摘要翻译：为每个功能执行部分布置存储功能执行部分的状态的状态通知寄存器。功能执行部分包括用于执行预定功能的至少一个电路。通过确定在状态通知寄存器中设置的两个值中的一个，识别在功能单元中发生的电源故障，并且在电源恢复时对识别的位置执行初始设置处理。

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