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1. 发明授权

US6011728A Synchronous memory with read and write mode 失效
标题翻译：具有读写模式的同步存储器
公开(公告)号：US6011728A
公开(公告)日：2000-01-04
申请号：US25075
申请日：1998-02-17
申请人： Koichi Akeyama
发明人： Koichi Akeyama
IPC分类号： G11C11/407 , G11C7/00 , G11C7/10 , G11C11/401 , G11C16/04
CPC分类号： G11C7/1072 , G11C7/1045
摘要： A semiconductor device that accesses a memory cell in synchronization with a clock signal and improves operation speed when data read-out and write-in are performed successively at the same address is provided.This device includes:at least two mode signal inputs that input operation mode signals that designate one of a read mode, a write mode, and an operation mode provided with a read-and-write mode;an input data latch circuit that temporarily stores data to be written into a memory cell; andan operation control circuit that evaluates the operation mode designated by said operation mode signals, and, when an operation mode designated by said operation mode signals is evaluated to be said read-and-write mode, controls successive operations of a read-out operation, that is the same as that of said read mode, in a first step within one clock cycle, and during this operation, temporarily stores data that is to be written in a memory cell in said input data latch circuit, and next, in a second step of the same clock cycle, writes-in data temporarily stored in said input data latch circuit to a memory cell selected in said first step.
摘要翻译：提供了一种半导体器件，其与时钟信号同步地访问存储单元，并且提供了在相同地址连续执行数据读出和写入时的操作速度。该装置包括：至少两个模式信号输入，其输入指定读取模式，写入模式和提供有读写模式的操作模式之一的操作模式信号; 一个临时存储要写入存储单元的数据的输入数据锁存电路; 以及操作控制电路，其评估由所述操作模式信号指定的操作模式，并且当由所述操作模式信号指定的操作模式被评估为所述读写模式时，控制读出操作的连续操作，与所述读取模式的相同，在一个时钟周期内的第一步，并且在该操作期间，将要写入存储单元的数据临时存储在所述输入数据锁存电路中，接下来，在相同时钟周期的第二步骤，将临时存储在所述输入数据锁存电路中的写入数据写入到在所述第一步骤中选择的存储器单元。

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