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1. 发明授权

US4918725A Terminal impedance setting circuit for a two-wire to four-wire converting circuit 失效
标题翻译：二线至四线转换电路的端子阻抗设定电路
公开(公告)号：US4918725A
公开(公告)日：1990-04-17
申请号：US276154
申请日：1988-11-23
申请人： Kiyoh Takahashi
发明人： Kiyoh Takahashi
IPC分类号： H04B1/58 , H04M1/76 , H04M7/00
CPC分类号： H04M7/0096 , H04B1/58 , H04M1/76
摘要： A terminal impedance setting circuit in a 2- to 4-wire converting circuit allows the characteristic impedance to be changed with accuracy while enhancing a miniaturization of the converting circuit. The impedance setting circuit has a first amplifier for amplifying signals that are incoming over a send pair of a four wire line and are destined for a two wire trunk line. A second amplifier amplifies signals that are incoming over the two wire trunk line and are destined for a receive pair of the four wire line. A resistor network is associated with each of the amplifiers for adjusting the output thereof. A shunt resistance is coupled between an input of the first amplifier and an output of the second amplifier for matching the impedance of the two wire trunk line. A semiconductor switch adjusts the resistances of the resistor networks and the shunt resistance in response to an external command.
摘要翻译： 2至4线转换电路中的端子阻抗设置电路允许特性阻抗随着精度而改变，同时增强转换电路的小型化。阻抗设定电路具有第一放大器，用于放大在四线制的发送对上输入的信号，并且用于二线干线。第二个放大器放大通过两条线路干线输入的信号，并且指向四条有线线路的接收对。电阻网络与每个放大器相关联，用于调整其输出。分流电阻耦合在第一放大器的输入端和第二放大器的输出端之间，用于匹配两线干线的阻抗。半导体开关根据外部指令调节电阻网络的电阻和分流电阻。

2. 发明授权

US4803681A Data transmission control system 失效
标题翻译：数据传输控制系统
公开(公告)号：US4803681A
公开(公告)日：1989-02-07
申请号：US70036
申请日：1987-07-06
申请人： Kiyoh Takahashi
发明人： Kiyoh Takahashi
IPC分类号： H04L12/403 , H04J3/26
CPC分类号： H04L12/403
摘要： A control system attends to an orderly transmission of data over a time division multiplex data bus. Each time that a terminal wants to transmit data over the data bus, it files a request for data transmission with an arbiter circuit, which normally grants the requests on a first come, first serve basis. If there are simultaneous requests, the arbiter consults a table of priorities stored in its memory. The one of the simultaneous requests with the highest priority is served first.Each terminal acknowledges the data which it receives. If the acknowledgment does not come back in a timely manner, the data is retransmitted.
摘要翻译：控制系统通过时分复用数据总线有序地传输数据。每当终端想要通过数据总线传输数据时，它将通过仲裁电路提交数据传输请求，该仲裁电路通常以先到先得的方式授予请求。如果同时发出请求，仲裁者会查看存储在其内存中的优先级表。首先提供具有最高优先级的同时请求之一。每个终端确认它接收到的数据。如果确认没有及时返回，则重新发送数据。

3. 发明授权

US5287355A Module comprising in an ATM exchange connection ports, each transmitting a cell indicative of a destination module in a cell header 失效
标题翻译：模块包括在ATM交换连接端口中，每个端口在小区头部中发送指示目的地模块的小区
公开(公告)号：US5287355A
公开(公告)日：1994-02-15
申请号：US910587
申请日：1992-07-08
申请人： Kiyoh Takahashi , Hiroshi Shimizu , Yoshihiko Itou , Osamu Yamato
发明人： Kiyoh Takahashi , Hiroshi Shimizu , Yoshihiko Itou , Osamu Yamato
IPC分类号： H04Q3/52 , H04L12/801 , H04L12/911 , H04L12/947 , H04Q11/04 , H04L12/40
CPC分类号： H04L12/5601 , H04L49/1553 , H04L49/255 , H04L2012/5652
摘要： In a local module (11(1)) of an asynchronous time division exchange or switching system, each of connection ports (17) transfers a transmission signal to a module bus (19) as a cell with its header made to indicate a destination module number and a destination port number as a VCI (Virtual channel identifier) when the signal is directed to a destination module (11(N)) and one of the connection ports, respectively. Preferably, a connection control unit (15) of the local module transfers and does not transfer the cell to a highway bus (13) when the signal is directed to the destination module and the last-mentioned one of the connection ports. More preferably, the header additionally indicates a binary one and zero bit when the signal is directed to the destination module and the last-mentioned one of the connection ports.
摘要翻译：在异步时分交换或交换系统的本地模块（11（1））中，每个连接端口（17）将发送信号作为小区传输到模块总线（19），其小区用于指示目的地模块数字和目的地端口号作为VCI（虚拟信道标识符），当该信号被分配到目的地模块（11（N））和一个连接端口时。优选地，当信号被引导到目的地模块和最后提到的一个连接端口时，本地模块的连接控制单元（15）传送并且不将小区传送到公路总线（13）。更优选地，当信号被引导到目的地模块和最后提到的一个连接端口时，头部还附加地指示二进制1和零比特。

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