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1. 发明申请

US20110013500A1 INFORMATION REPRODUCTION APPARATUS AND INFORMATION REPRODUCTION METHOD 有权
标题翻译：信息再现装置和信息再现方法
公开(公告)号：US20110013500A1
公开(公告)日：2011-01-20
申请号：US12827090
申请日：2010-06-30
申请人： Kinji KAYANUMA
发明人： Kinji KAYANUMA
IPC分类号： G11B20/10
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10055 , G11B20/10111 , G11B20/10277 , G11B20/10296 , G11B20/10351 , G11B20/10379 , G11B20/10462
摘要： A small size circuit reproducing data with low error rate even when a signal includes a non-linear distortion is desired. In such a circuit, the Viterbi method is performed. In the Viterbi method, branch metrics are calculated based on a difference of a sampled reproduction signal and a predetermined expectation values. Path metrics are calculated from the branch metrics. Paths among the plurality of paths having the calculated path metrics and merging at a same state are compared with one another. Based on the magnitude of the compared path metrics, survivor path is selected. In the circuit, for the path metrics of paths merging at a same state, offset corresponding to a determination result until a merging point is added to the paths for the comparison for determining the survivor path from the plurality of merging paths.
摘要翻译：即使当信号包括非线性失真时，小尺寸电路也以低错误率再现数据。在这样的电路中，执行维特比法。在维特比方法中，基于采样再现信号和预定期望值的差来计算分支度量。路径指标由分支指标计算。将具有计算出的路径度量并在相同状态合并的多个路径中的路径彼此进行比较。基于比较路径度量的大小，选择幸存者路径。在电路中，对于在相同状态下合并的路径的路径度量，对应于确定结果的偏移量直到将合并点添加到用于比较的路径以确定来自多个合并路径的幸存路径。

2. 发明授权

US07492696B2 Optical disk medium and optical disk apparatus 失效
标题翻译：光盘介质和光盘装置
公开(公告)号：US07492696B2
公开(公告)日：2009-02-17
申请号：US10778922
申请日：2004-02-17
申请人： Yutaka Yamanaka , Kinji Kayanuma , Chosaku Noda , Hiroharu Satoh , Hideaki Ohsawa
发明人： Yutaka Yamanaka , Kinji Kayanuma , Chosaku Noda , Hiroharu Satoh , Hideaki Ohsawa
IPC分类号： G11B7/24
CPC分类号： G11B7/24082 , G11B7/0053 , G11B7/00745 , G11B20/22 , G11B27/24
摘要： The length of a format modulation area in an address segment is limited to be 25% of the address-segment length or less, and the position of the format modulation area is selectable two possible positions. Subsequently, where a CLV optical-disk medium is used, wobble modulation areas in adjacent recording tracks do not overlap each other in the radius direction.
摘要翻译：地址段中的格式调制区域的长度被限制为地址段长度的25％以下，格式调制区域的位置可选择两个可能的位置。随后，在使用CLV光盘介质的情况下，相邻记录磁道中的摆动调制区域在半径方向上不重叠。

3. 发明授权

US5561647A System for detection of readout signals from optical disc 失效
标题翻译：用于从光盘检测读出信号的系统
公开(公告)号：US5561647A
公开(公告)日：1996-10-01
申请号：US363942
申请日：1994-12-27
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B7/00 , G11B5/09 , G11B7/005 , G11B20/10
CPC分类号： G11B5/09 , G11B20/10009
摘要： An equalizer is controlled to equalize a signal read from an optical disc. The equalized signal is supplied to a maximum-likelihood sequence detection circuit, in which a signal sequence is detected to be most coincident to the equalized signal among signal sequences meeting a state transition regularity. The equalizer operates for equalization, only when an error signal is detected in the vicinity of the end of a region having a code transition interval of more than number of minimum transition interval.
摘要翻译：控制均衡器以使从光盘读取的信号相等。均衡信号被提供给最大似然序列检测电路，其中检测到信号序列与满足状态转换规则性的信号序列中的均衡信号最相符。均衡器仅在具有大于最小转换间隔数的码转换间隔的区域的末端附近检测到错误信号时进行均衡。

4. 发明授权

US07817528B2 Optical disk medium and optical disk apparatus 有权
标题翻译：光盘介质和光盘装置
公开(公告)号：US07817528B2
公开(公告)日：2010-10-19
申请号：US11889909
申请日：2007-08-17
申请人： Yutaka Yamanaka , Kinji Kayanuma , Chosaku Noda , Hiroharu Satoh , Hideaki Ohsawa
发明人： Yutaka Yamanaka , Kinji Kayanuma , Chosaku Noda , Hiroharu Satoh , Hideaki Ohsawa
IPC分类号： G11B7/24
CPC分类号： G11B7/24082 , G11B7/0053 , G11B7/00745 , G11B20/22 , G11B27/24
摘要： The length of a format modulation area in an address segment is limited to be 25% of the address-segment length or less, and the position of the format modulation area is selectable two possible positions. Subsequently, where a CLV optical-disk medium is used, wobble modulation areas in adjacent recording tracks do not overlap each other in the radius direction.
摘要翻译：地址段中的格式调制区域的长度被限制为地址段长度的25％以下，格式调制区域的位置可选择两个可能的位置。随后，在使用CLV光盘介质的情况下，相邻记录磁道中的摆动调制区域在半径方向上不重叠。

5. 发明授权

US08644122B2 Header region evaluation circuit, optical disk apparatus, and header region evaluation method 有权
标题翻译：标题区域评估电路，光盘装置和标题区域评估方法
公开(公告)号：US08644122B2
公开(公告)日：2014-02-04
申请号：US13619638
申请日：2012-09-14
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B27/36
CPC分类号： G11B20/10046 , G11B7/0053 , G11B7/00718 , G11B7/0901 , G11B2020/1274 , G11B2220/2537
摘要： A header region evaluation circuit includes a difference signal detection unit that detects a difference signal proportional to a difference in amounts of received light from an optical disc, a high pass filter that switches a plurality of cutoff frequencies according to a passband control signal, removes a low frequency component from the difference signal, and generates a difference signal HPF output, a waveform shaping unit that generates a shaping signal to convert the difference signal HPF output into a pulse, and a physical header detection sequencer that generates a groove detection signal for evaluating whether the physical header region is either one of a groove and an inter-groove and generates a passband control signal for controlling the cutoff frequency to be reduced for a difference signal corresponding to at least a part of the physical header region.
摘要翻译：标题区域评估电路包括差分信号检测单元，其检测与来自光盘的接收光量的差成比例的差信号，根据通带控制信号切换多个截止频率的高通滤波器，产生差分信号HPF输出的波形整形单元，产生将信号HPF输出转换为脉冲的整形信号的波形整形单元，以及产生用于评价的沟槽检测信号的物理头部检测定序器物理标题区域是凹槽还是沟槽之一，并且产生用于控制对应于物理标题区域的至少一部分的差分信号来减小截止频率的通带控制信号。

6. 发明申请

US20130107689A1 HEADER REGION EVALUATION CIRCUIT, OPTICAL DISK APPARATUS, AND HEADER REGION EVALUATION METHOD 有权
标题翻译：高尔夫地区评估电路，光盘设备和高尔夫地区评估方法
公开(公告)号：US20130107689A1
公开(公告)日：2013-05-02
申请号：US13619638
申请日：2012-09-14
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B27/36
CPC分类号： G11B20/10046 , G11B7/0053 , G11B7/00718 , G11B7/0901 , G11B2020/1274 , G11B2220/2537
摘要： A header region evaluation circuit includes a difference signal detection unit that detects a difference signal proportional to a difference in amounts of received light from an optical disc, a high pass filter that switches a plurality of cutoff frequencies according to a passband control signal, removes a low frequency component from the difference signal, and generates a difference signal HPF output, a waveform shaping unit that generates a shaping signal to convert the difference signal HPF output into a pulse, and a physical header detection sequencer that generates a groove detection signal for evaluating whether the physical header region is either one of a groove and an inter-groove and generates a passband control signal for controlling the cutoff frequency to be reduced for a difference signal corresponding to at least a part of the physical header region.
摘要翻译：标题区域评估电路包括差分信号检测单元，其检测与来自光盘的接收光量的差成比例的差信号，根据通带控制信号切换多个截止频率的高通滤波器，产生差分信号HPF输出的波形整形单元，产生将信号HPF输出转换为脉冲的整形信号的波形整形单元，以及产生用于评价的沟槽检测信号的物理头部检测定序器物理标题区域是凹槽还是沟槽之一，并且产生用于控制对应于物理标题区域的至少一部分的差分信号来减小截止频率的通带控制信号。

7. 发明授权

US08310905B2 Wobble signal extracting circuit, method for extracting wobble signal, and optical disk unit 有权
标题翻译：摆动信号提取电路，摆动信号提取方法，光盘单元
公开(公告)号：US08310905B2
公开(公告)日：2012-11-13
申请号：US13232683
申请日：2011-09-14
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B15/52
CPC分类号： G11B7/0053 , G11B20/10027 , G11B20/10046 , G11B20/10342
摘要： A wobble signal extracting circuit includes: a readout signal generating circuit generating an RF signal by adding first and second detection signals corresponding to reflected light from inside and outside a recording track; a first subtractor generating a push-pull signal by subtracting the first and second detection signals, respectively; a first analog-to-digital converter (ADC) converting the RF signal to digital; a second ADC converting the push-pull signal to digital; a residual RF component generating circuit generating a residual RF signal component equivalent to the RF signal component remaining in the digitized push-pull signal; and a second subtractor generating the wobble signal by subtracting the residual RF signal component from the digitized push-pull signal. The residual RF component generating circuit generates the residual RF signal component so that it may approach the remaining RF signal component based on correlation between the wobble signal and the digitized RF signal.
摘要翻译：摆动信号提取电路包括：读出信号发生电路，通过加上对应于来自记录磁道内部和外部的反射光的第一和第二检测信号来产生RF信号; 第一减法器，分别通过减去第一和第二检测信号产生推挽信号; 将RF信号转换为数字的第一模数转换器（ADC）; 第二个ADC将推挽信号转换为数字; 剩余RF分量产生电路，产生与数字化推挽信号中剩余的RF信号分量相当的剩余RF信号分量; 以及第二减法器，通过从数字化推挽信号中减去残余RF信号分量来产生摆动信号。剩余RF分量产生电路产生剩余RF信号分量，使得它可以基于摆动信号和数字化RF信号之间的相关性来接近剩余的RF信号分量。

8. 发明申请

US20100329088A1 DEVICE FOR DETERMINING EXISTENCE OF WOBBLE, MEDIUM DISCRIMINATION DEVICE, METHOD OF DETERMINING EXISTENCE OF WOBBLE, AND MEDIUM DISCRIMINATION METHOD 审中-公开
标题翻译：用于确定WOBBLE，中间辨别装置的存在的装置，确定WOBBLE的存在的方法和中间辨别方法
公开(公告)号：US20100329088A1
公开(公告)日：2010-12-30
申请号：US12865195
申请日：2009-01-30
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B7/007
CPC分类号： G11B19/12 , G11B7/0053
摘要： The invention device has amplitude correction means for generating, from a radial push-pull signal, a wobble signal which has been corrected such that the amplitude of a predetermined frequency component is kept substantially constant, and for outputting a magnification for correcting the amplitude of the predetermined frequency component as a gain control signal, and determination means for determining whether or not wobble exists based on a minimum value of the magnification indicated by the gain control signal.
摘要翻译：本发明装置具有幅度校正装置，用于从径向推挽信号产生已被校正的摆动信号，使得预定频率分量的振幅保持基本上恒定，并且用于输出校正幅度的倍率预定频率分量作为增益控制信号，以及确定装置，用于基于由增益控制信号指示的倍率的最小值来确定是否存在摆动。

9. 发明申请

US20060120263A1 Optical recording medium and its information recording method, and recorder 审中-公开
标题翻译：光记录介质及其信息记录方法和记录仪
公开(公告)号：US20060120263A1
公开(公告)日：2006-06-08
申请号：US10525098
申请日：2003-08-12
申请人： Kinji Kayanuma
发明人： Kinji Kayanuma
IPC分类号： G11B7/24
CPC分类号： G11B7/00718 , G11B7/0045 , G11B7/0053 , G11B7/00745 , G11B7/24082
摘要： An optical disk includes grooves (G) formed concentrically or spirally from an inner periphery to an output periphery of a disk, wherein prepit (1) are formed on the lands (L) each sandwiched between grooves and grooves (G). The prepit forming region (2) is assigned as a region in which a single or a plurality of prepits (1) are formed. Th prepit forming regions (2) have a fixed length 36 or less times the recording channel length along the recording track, and are arranged apart from on another by 300 or more times the recording channel bit length along the recording track. On the prepit forming region (2), a pattern including a long mark or a long space having a length ten or more times the recording channel bit length so that the long mark or long space covers the prepit (1) on the recording track.
摘要翻译：光盘包括从盘的内周到输出周边同心或螺旋形成的凹槽（G），其中每个凹槽（L）上都分别形成有凹槽（G）和凹槽（G）之间的预凹坑（1）。将预制坑形成区域（2）分配为形成单个或多个预凹坑（1）的区域。预置凹坑形成区域（2）具有沿着记录轨道的记录通道长度的固定长度36或更小，并且沿着记录轨道将记录通道位长度分开放置三分之一以上。在预凹坑形成区域（2）上，包括具有长度为十倍或更多倍于记录通道位长度的长标记或长空间的图案，使得长标记或长空间覆盖记录轨道上的预凹坑（1）。

10. 发明授权

US07680235B2 VCO circuit, PLL circuit using VCO circuit, and data recording apparatus the PLL circuit 有权
标题翻译： VCO电路，使用VCO电路的PLL电路和PLL电路的数据记录装置
公开(公告)号：US07680235B2
公开(公告)日：2010-03-16
申请号：US11020133
申请日：2004-12-27
申请人： Masaki Sano , Kinji Kayanuma
发明人： Masaki Sano , Kinji Kayanuma
IPC分类号： H03D3/24
CPC分类号： H03L7/087 , H03D13/003
摘要： A PLL circuit includes a phase comparing section, a low pass filter, a digital VCO circuit, and a frequency divider. The phase comparing section compares an inputted clock signal and a frequency-divided clock signal in phase to detect a phase difference. The low pass filter averages the phase difference outputted from the phase comparing section to output the averaged result as a frequency control input. The digital VCO circuit operates in synchronism with a reference clock signal, and generates a sync clock signal based on the frequency control input while a phase of the sync clock signal is controlled in units of predetermined resolution values. The predetermined resolution value is a 1/K (K is a natural number more than 1) of a period of the reference clock signal. The frequency divider frequency-divides the synch clock signal to generate the frequency-divided clock signal.
摘要翻译： PLL电路包括相位比较部分，低通滤波器，数字VCO电路和分频器。相位比较部分将输入的时钟信号和分频时钟信号同相进行比较，以检测相位差。低通滤波器对从相位比较部分输出的相位差进行平均，以将平均结果输出为频率控制输入。数字VCO电路与参考时钟信号同步工作，并且在以预定分辨率值为单位控制同步时钟信号的相位时，基于频率控制输入产生同步时钟信号。预定分辨率值是参考时钟信号的周期的1 / K（K是大于1的自然数）。分频器频率分频同步时钟信号以产生分频时钟信号。

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