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1. 发明授权

US06608589B1 Autonomous satellite navigation system 有权
标题翻译：自主卫星导航系统
公开(公告)号：US06608589B1
公开(公告)日：2003-08-19
申请号：US09295544
申请日：1999-04-21
申请人： William S. Devereux , Robert J. Heins , Albert A. Chacos , Lloyd A. Linstrom , Mark S. Asher , Dennis J. Duven , Don M. Gruenbacher , Thomas L. Kusterer , Kim Strohbehn , Richard C. Morgan
发明人： William S. Devereux , Robert J. Heins , Albert A. Chacos , Lloyd A. Linstrom , Mark S. Asher , Dennis J. Duven , Don M. Gruenbacher , Thomas L. Kusterer , Kim Strohbehn , Richard C. Morgan
IPC分类号： G01S514
CPC分类号： G01S19/14 , G01C21/00 , G01S19/37 , G01S19/54
摘要： An autonomous navigation system for an orbital platform incorporating a global positioning system based navigation device optimized for low-Earth orbit and medium-Earth orbit applications including a 12-channel, GPS tracking application-specific integrated circuit operating in concert with a microprocessor implementing an extended Kalman filter and orbit propagator which autonomously generates estimates of position, velocity, and time to enable planing, prediction and execution of event-based commanding of mission operations.
摘要翻译：一种用于轨道平台的自主导航系统，其结合了针对低地球轨道和中地球轨道应用而优化的全球定位系统的导航装置，包括与实施扩展的微处理器一致的12通道GPS跟踪应用专用集成电路卡尔曼滤波器和轨道传播器，其自主地产生位置，速度和时间的估计，以实现对任务操作的基于事件的指挥的计划，预测和执行。

2. 发明授权

US06965396B1 Video-centroid integrated circuit 失效
标题翻译：视频中心集成电路
公开(公告)号：US06965396B1
公开(公告)日：2005-11-15
申请号：US09562296
申请日：2000-05-01
申请人： Kim Strohbehn
发明人： Kim Strohbehn
IPC分类号： G06K9/36 , G06K9/52 , H04N5/225 , H04N5/372 , H04N5/378
CPC分类号： G06K9/52 , H04N5/335
摘要： An analog, single integrated circuit for providing centered video images. A light detector array which can be, e.g., a CCD or an array of phototransistors or silicon retinas, is scanned out to provide a video signal. Current summing lines along each row and column of the array are used as inputs to x and y position sensitive (computation) circuitry located on the edge of the pixel array. When the array utilizes silicon retinas, an absolute value circuit is added to restore low frequency information removed by the retinas to the current summing output. An on-chip sequencer uses the x and y position outputs to scan out the video image centered to the nearest pixel.
摘要翻译：一种用于提供中心视频图像的模拟单个集成电路。可以扫描出例如CCD或光电晶体管或硅视网膜阵列的光检测器阵列，以提供视频信号。沿着阵列的每行和列的电流求和行用作位于像素阵列边缘的x和y位置敏感（计算）电路的输入。当阵列使用硅视网膜时，添加绝对值电路以将由视网膜移除的低频信息恢复到当前求和输出。片内音序器使用x和y位置输出扫描以最近像素为中心的视频图像。

3. 发明授权

US6058223A Video-centroid integrated circuit 失效
标题翻译：视频中心集成电路
公开(公告)号：US6058223A
公开(公告)日：2000-05-02
申请号：US671225
申请日：1996-06-27
申请人： Kim Strohbehn
发明人： Kim Strohbehn
IPC分类号： G06K9/00
CPC分类号： G06K9/00
摘要： An analog, single integrated circuit for providing centered video images. A light detector array which can be, e.g., a CCD or an array of phototransistors or silicon retinas, is scanned out to provide a video signal. Current summing lines along each row and column of the array are used as inputs to x and y position sensitive (computation) circuitry located on the edge of the pixel array. When the array utilizes silicon retinas, an absolute value circuit is added to restore low frequency information removed by the retinas to the current summing output. An on-chip sequencer uses the x and y position outputs to scan out the video image centered to the nearest pixel.
摘要翻译：一种用于提供中心视频图像的模拟单个集成电路。可以扫描出例如CCD或光电晶体管或硅视网膜阵列的光检测器阵列，以提供视频信号。沿着阵列的每行和列的电流求和行用作位于像素阵列边缘的x和y位置敏感（计算）电路的输入。当阵列使用硅视网膜时，添加绝对值电路以将由视网膜移除的低频信息恢复到当前求和输出。片内音序器使用x和y位置输出扫描以最近像素为中心的视频图像。

4. 发明授权

US06930298B2 Method and structure for minimizing error sources in image and position sensing detectors 有权
标题翻译：用于最小化图像和位置感测检测器中的误差源的方法和结构
公开(公告)号：US06930298B2
公开(公告)日：2005-08-16
申请号：US10398686
申请日：2001-11-13
申请人： Kim Strohbehn , Mark N. Martin
发明人： Kim Strohbehn , Mark N. Martin
IPC分类号： G06T1/00 , H01L27/146 , H04N5/345 , H04N5/357 , H04N5/3745 , H01L27/00
CPC分类号： H04N5/3745 , G06T1/0007 , H01L27/14609 , H04N5/345 , H04N5/357
摘要： A method and structure for minimizing one or more non-uniformities in image and position sensing detectors are provided. The structure is directed to a focal plane processor for removing non-uniformities which distort the computation of a desired property of an object of interest in an image field. The focal plane processor is capable of selectively disconnecting one or more rows and/or columns from further processing in the imaging array for those rows and/or columns which contribute to the presence of at least one non-uniformity in a video image generated by the focal plane processor. In one embodiment, the disconnection means is embodied as pre-processing circuitry which includes row and column shift registers which provide control signals to area-of-interest (AOI) switches. In another embodiment, the pixels which comprise the focal plane array are constructed in a manner which facilitates their individual isolation.
摘要翻译：提供了用于最小化图像和位置感测检测器中的一个或多个不均匀性的方法和结构。该结构指向焦平面处理器，用于去除在图像场中使感兴趣对象的期望属性的计算失真的不均匀性。焦平面处理器能够选择性地断开一个或多个行和/或列以避免成像阵列中的那些行和/或列的进一步处理，这些行和/或列有助于在由视频图像生成的视频图像中存在至少一个不均匀性焦平面处理器在一个实施例中，断开装置体现为预处理电路，其包括向感兴趣区域（AOI）开关提供控制信号的行和列移位寄存器。在另一个实施例中，构成焦平面阵列的像素以促进其单独隔离的方式构造。

5. 发明授权

US4805228A Cellular logic processor 失效
标题翻译：蜂窝逻辑处理器
公开(公告)号：US4805228A
公开(公告)日：1989-02-14
申请号：US45962
申请日：1987-05-04
申请人： Robert E. Jenkins , D. Gilbert Lee, Jr. , Robert C. Moore , Kim Strohbehn
发明人： Robert E. Jenkins , D. Gilbert Lee, Jr. , Robert C. Moore , Kim Strohbehn
IPC分类号： G06K9/56 , G06T3/00 , G06K9/44
CPC分类号： G06T1/20 , G06K9/56
摘要： A cellular logic operation processor for performing transformations, according to a controlled sequence, of the data points of a first matrix into a corresponding number of data points of a second matrix. The processor includes a plurality of operably connected digital storage devices for temporarily and sequentially storing each neighborhood of data points from a first matrix, wherein a neighborhood of data points is comprised of a central data point and its surrounding data points in a matrix. The processor also includes a plurality of taps wherein each tap is electrically connected to a digital storage device such that the tap electrically indicates the state of the data point stored in the digital storage device. A look-up table is also provided having stored therein a plurality of transformation values which are individually addressable in accordance with the combined states indicated by the taps. The transformation value addressed in response to the combined states indicated by the taps is output by the processor as the transformation value of the central data points of the currently stored neighborhood.
摘要翻译：一种蜂窝逻辑运算处理器，用于根据受控序列将第一矩阵的数据点转换成第二矩阵的相应数量的数据点。处理器包括多个可操作地连接的数字存储设备，用于临时和顺序地存储来自第一矩阵的数据点的每个邻域，其中数据点的邻域由矩阵中的中心数据点及其周围的数据点组成。处理器还包括多个抽头，其中每个抽头电连接到数字存储设备，使得抽头电指示存储在数字存储设备中的数据点的状态。还提供了一种查找表，其中存储有根据由抽头指示的组合状态可单独寻址的多个变换值。响应于由抽头指示的组合状态寻址的变换值由处理器输出为当前存储的邻域的中心数据点的变换值。

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