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1. 发明授权

US06873209B2 Input buffer circuit having function of canceling offset voltage 失效
标题翻译：具有消除失调电压功能的输入缓冲电路
公开(公告)号：US06873209B2
公开(公告)日：2005-03-29
申请号：US10670217
申请日：2003-09-26
申请人： Kengo Takata , Tsutomu Yoshimura , Harufusa Kondo , Hironobu Ito
发明人： Kengo Takata , Tsutomu Yoshimura , Harufusa Kondo , Hironobu Ito
IPC分类号： H03K19/0175 , H03F3/45 , H04L25/02
CPC分类号： H03F3/45748 , H03F2203/45342 , H03F2203/45652
摘要： An input buffer circuit without a drop of a capability of a circuit and a limitation of a connection type with a circuit of a former stage is obtained. The output signal (OUTB) is inputted to a first low pass filter circuit, and the first low pass filter circuit integrates the output signal (OUTB). A result of the integration is stored as a voltage value (V2a) in the capacitor (4s). In the same manner, an output signal (OUT) is inputted to a second low pass filter circuit, and the second low pass filter circuit integrates the output signal (OUT). A result of the integration is stored as a voltage value (V2b) in a capacitor (4t). A differential amplifier circuit (5) generates appropriate voltages (V3a and V3b) according to a design specification of the transistors (1x and 1y) by amplifying the voltage values (V2a and V2b) and outputs them. The voltages (V3a and V3b) are impressed on respective back gates of the transistors (1x and 1y), respectively.
摘要翻译：获得了没有电路性能下降的输入缓冲器电路和与前一级电路的连接类型的限制。输出信号（OUTB）输入到第一低通滤波器电路，第一低通滤波器电路对输出信号（OUTB）进行积分。积分的结果作为电压值（V2a）存储在电容器（4s）中。以相同的方式，将输出信号（OUT）输入到第二低通滤波器电路，并且第二低通滤波器电路对输出信号（OUT）进行积分。积分的结果作为电压值（V2b）存储在电容器（4t）中。差分放大器电路（5）通过放大电压值（V2a和V2b），根据晶体管（1x和1y）的设计规格产生适当的电压（V3a和V3b）并将其输出。电压（V3a和V3b）分别施加在晶体管（1x和1y）的相应后栅上。

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