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1. 发明授权

US5476819A Substrate anchor for undercut silicon on insulator microstructures 失效
标题翻译：底切绝缘子微结构的基底锚固
公开(公告)号：US5476819A
公开(公告)日：1995-12-19
申请号：US251902
申请日：1994-06-01
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01P15/12 , G01P15/08 , G01P15/125 , G01P15/13 , H01L21/306 , H01L29/84 , H01L21/465
CPC分类号： G01P15/0802 , G01P15/125 , G01P15/131 , G01P2015/0828
摘要： An accelerometer is fabricated by forming a proofmass and at least one associated hinge in a silicon substrate through a variety of a etching and bonding processes is disclosed. The processes entail ion implantation and formation of an oxide support layer below the proofmass, integrally bonding two complementary proofmass and substrate structures together, and then removing the oxide support layer to leave the proofmass supported by the hinge within the body of silicon material. The proofmass may be electrically connected to a lead extending through an etched recess in one of the substrates, and the proofmass may be electrically isolated or separated from the substrates by an oxide layer and by a change in conductivity type of the semiconductor material wherein the hinge is structurally mounted to the substrates. In a bond and etch back process, the wafer is processed, sawed in half, and then bonded together again wherein the complementary halves are joined to obtain the finished accelerometer. As part of the bond and etch-back process, an anchor for bridging the silicon substrate to an oxide support substrate includes using a selective epitaxy or non-selective epitaxy process to grow the polysilicon anchors.
摘要翻译：通过各种蚀刻和粘合工艺公开了通过在硅衬底中形成校样和至少一个相关联的铰链来制造加速度计。这些过程需要离子注入和在校样下方形成氧化物载体层，将两个互补的校正材料和衬底结构整体地结合在一起，然后去除氧化物载体层，以将由硅材料体内的铰链支撑的校准物留下。校样物可以电连接到延伸穿过其中一个衬底中的蚀刻凹槽的引线，并且校样物可以通过氧化物层与衬底电隔离或分离，并且通过半导体材料的导电类型的变化，其中铰链结构上安装在基板上。在接合和回蚀工艺中，将晶片加工成锯片，然后再次粘合在一起，其中互补的半部分连接以获得成品的加速度计。作为粘结和回蚀工艺的一部分，用于将硅衬底桥接到氧化物支撑衬底的锚固件包括使用选择性外延或非选择性外延工艺来生长多晶硅锚定件。

2. 发明授权

US5142921A Force balance instrument with electrostatic charge control 失效
标题翻译：具有静电充电控制的力平衡仪器
公开(公告)号：US5142921A
公开(公告)日：1992-09-01
申请号：US605947
申请日：1990-10-29
申请人： Robert E. Stewart , Keith O. Warren
发明人： Robert E. Stewart , Keith O. Warren
IPC分类号： G01P15/125 , G01D3/06 , G01L1/08 , G01P15/13
CPC分类号： G01P15/131
摘要： A force balanced instrument, such as an accelerometer, employs a pendulous mass having combined electrostatic pickoff and forcing plates on opposite sides thereof. The plates provide a constant attractive force in successive periods acting alternatively on opposing sides of the sensitive element. Force balance is achieved by controlling the duty cycle so that the difference in duration between each of the parts of a full cycle is a linear measure of acceleration. Voltage on each of the forcing plates is sensed independently immediately after each is charged with a fixed charging pulse which provides a fixed force level over the duration of the part cycle. The two successive voltage samples are stored, and the difference between them integrated to control the duty cycle of a pulse width modulator, which itself controls the duration of application of the alternately directed forces applied by the respective plates to the pendulous mass.
摘要翻译：诸如加速度计的力平衡仪器使用具有组合的静电吸收和强制板在其相对侧上的下摆质量。这些板在连续的周期中提供恒定的吸引力，作用在敏感元件的相对侧上。通过控制占空比实现力平衡，使得整个循环的每个部分之间的持续时间差是加速度的线性度量。在每个强制板上的电压在每个被充满固定的充电脉冲之后立即独立地感测，在固定的充电脉冲上提供在部件周期的持续时间内的固定的力水平。存储两个连续的电压样本，并且它们之间的差被集成以控制脉冲宽度调制器的占空比，其本身控制由相应的板施加到下摆质量的交替指向的力的施加持续时间。

3. 发明授权

US5850042A Electrostatically force balanced silicon accelerometer 失效
标题翻译：静电强制平衡硅加速度计
公开(公告)号：US5850042A
公开(公告)日：1998-12-15
申请号：US569356
申请日：1995-12-08
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01P15/12 , G01P15/08 , G01P15/125 , G01P15/13 , H01L29/84
CPC分类号： G01P15/0802 , G01P15/125 , G01P15/131 , G01P2015/0828
摘要： An accelerometer is fabricated by forming a proofmass and at least one associated hinge in a silicon substrate by ion implantation and the formation of an oxide support layer below the proofmass, subsequently integrally bonding two complementary proofmass and substrate structures together, and then removing the oxide support layer to leave the proofmass supported by the hinge within the body of silicon material. The proofmass may be electrically connected to a lead extending through an etched recess in one of the substrates; and the proofmass may be electrically isolated or separated from the substrates by an oxide layer and by a change in conductivity type of the semiconductor material where the hinge is structurally mounted to the substrates.
摘要翻译：加速度计是通过在硅衬底中通过离子注入形成校样和至少一个相关联的铰链来制造的，并且在校正质量下形成氧化物支撑层，随后将两个互补的校准质量和衬底结构整体地结合在一起，然后去除氧化物载体层离开由硅材料体内的铰链支撑的校准。校样物可以电连接到延伸穿过其中一个衬底中的蚀刻凹槽的引线; 并且校样物可以通过氧化物层和衬底的结构上安装到衬底上的半导体材料的导电类型的变化而与衬底电隔离或分离。

4. 发明授权

US5840199A Method for purging a multi-layer sacrificial etched silicon substrate 失效
标题翻译：吹扫多层牺牲蚀刻硅衬底的方法
公开(公告)号：US5840199A
公开(公告)日：1998-11-24
申请号：US841938
申请日：1997-04-08
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01P15/125 , H01L21/00
CPC分类号： G01P15/125
摘要： An accelerometer is fabricated by forming a proofmass and at least one associated hinge in a silicon substrate through a variety of a etching and bonding processes is disclosed. The processes entail ion implantation and formation of an oxide support layer below the proofmass, integrally bonding two complementary proofmass and substrate structures together, and then removing the oxide support layer to leave the proofmass supported by the hinge within the body of silicon material. The proofmass may be electrically connected to a lead extending through an etched recess in one of the substrates, and the proofmass may be electrically isolated or separated from the substrates by an oxide layer and by a change in conductivity type of the semiconductor material wherein the hinge is structurally mounted to the substrates. In a bond and etch back process, the wafer is processed, sawed in half, and then bonded together again wherein the complementary halves are joined to obtain the finished accelerometer. As part of the bond and etch-back process, an anchor for bridging the silicon substrate to an oxide support substrate includes using a selective epitaxy or non-selective epitaxy process to grow the polysilicon anchors.
摘要翻译：通过各种蚀刻和粘合工艺公开了通过在硅衬底中形成校样和至少一个相关联的铰链来制造加速度计。这些过程需要离子注入和在校样下方形成氧化物载体层，将两个互补的校正材料和衬底结构整体地结合在一起，然后去除氧化物载体层，以使得由硅材料体内的铰链支撑的校准物质。校样物可以电连接到延伸穿过其中一个衬底中的蚀刻凹槽的引线，并且校样物可以通过氧化物层与衬底电隔离或分离，并且通过半导体材料的导电类型的变化，其中铰链结构上安装在基板上。在接合和回蚀工艺中，将晶片加工成锯片，然后再次粘合在一起，其中互补的半部分连接以获得成品的加速度计。作为粘结和回蚀工艺的一部分，用于将硅衬底桥接到氧化物支撑衬底的锚固件包括使用选择性外延或非选择性外延工艺来生长多晶硅锚定件。

5. 发明授权

US5503285A Method for forming an electrostatically force balanced silicon accelerometer 失效
标题翻译：用于形成静电力平衡硅加速度计的方法
公开(公告)号：US5503285A
公开(公告)日：1996-04-02
申请号：US97084
申请日：1993-07-26
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01P15/12 , G01P15/08 , G01P15/125 , G01P15/13 , H01L29/84 , H01L21/00 , B44C1/22
CPC分类号： G01P15/0802 , G01P15/125 , G01P15/131 , G01P2015/0828
摘要： An accelerometer is fabricated by forming a proofmass and at least one associated hinge in a silicon substrate by ion implantation and the formation of an oxide support layer below the proofmass, subsequently integrally bonding two complementary proofmass and substrate structures together, and then removing the oxide support layer to leave the proofmass supported by the hinge within the body of silicon material. The proofmass may be electrically connected to a lead extending through an etched recess in one of the substrates; and the proofmass may be electrically isolated or separated from the substrates by an oxide layer and by a change in conductivity type of the semiconductor material where the hinge is structurally mounted to the substrates.
摘要翻译：加速度计是通过在硅衬底中通过离子注入形成校样和至少一个相关联的铰链来制造的，并且在校正质量下形成氧化物支撑层，随后将两个互补的校准质量和衬底结构整体地结合在一起，然后去除氧化物载体层离开由硅材料体内的铰链支撑的校准。校样物可以电连接到延伸穿过其中一个衬底中的蚀刻凹槽的引线; 并且校样物可以通过氧化物层和衬底的结构上安装到衬底上的半导体材料的导电类型的变化而与衬底电隔离或分离。

6. 发明授权

US5497660A Digital force balanced instrument 失效
标题翻译：数字力平衡仪
公开(公告)号：US5497660A
公开(公告)日：1996-03-12
申请号：US251591
申请日：1994-05-31
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01P15/125 , G01P15/13 , G01P15/00
CPC分类号： G01P15/131 , G01P15/125
摘要： A digital force balanced instrument such as an accelerometer that incorporates a directly digital electrostatic forcer with servo loop plates charged by a digital feedback loop is disclosed. The accelerometer has a proofmass electrode suspended in a cantilever configuration between electrodes on either side thereof, which proofmass is displaced upon acceleration. Each side electrode includes a plurality of electrostatic plates sized in binarily weighted multiples of area. An induced signal in the proofmass electrode is quantized via A/D converter in the feedback loop, which activates the appropriate number of plates to force the proofmass to an initial position.
摘要翻译：公开了一种数字力平衡仪器，例如加速度计，其包括由数字反馈回路充电的具有伺服环路板的直接数字静电除尘器。加速度计具有悬挂在其两侧的电极之间的悬臂结构的校准电极，该加强度计在加速时被移位。每个侧电极包括多个静电板，其尺寸为二次加权的倍数倍。在反馈回路中，通过A / D转换器量化校样电极中的感应信号，激活适当数量的板，以将校准力强制到初始位置。

7. 发明授权

US5446616A Electrode structure and method for anodically-bonded capacitive sensors 失效
标题翻译：用于阳极结合电容传感器的电极结构和方法
公开(公告)号：US5446616A
公开(公告)日：1995-08-29
申请号：US218711
申请日：1994-03-28
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： G01L1/14 , G01D3/06 , G01D5/241 , G01L9/12 , G01P15/08 , G01P15/125 , H01L29/84 , H01G7/00
CPC分类号： G01D5/2417 , G01D3/066 , G01P15/0802 , G01P15/125 , G01P2015/0828 , Y10T29/43
摘要： A sensing electrode on a glass layer of an anodically-bonded capacitive sensor has an interfacial barrier film containing a nitride compound between the electrode and the glass layer. In one embodiment, the capacitive sensor is an inertial sensor having a sensing element hingedly mounted to a frame which is anodically bonded to the glass layer. The sensing electrode is then located on a surface of the glass layer facing the sensing element. The sensing element and the frame are preferably made of silicon and the interfacial film is preferably silicon nitride.
摘要翻译：在阳极结合的电容式传感器的玻璃层上的感测电极具有在电极和玻璃层之间含有氮化物化合物的界面阻挡膜。在一个实施例中，电容传感器是惯性传感器，其具有铰接地安装到框架的感测元件，该框架阳极地结合到玻璃层。感测电极然后位于面向感测元件的玻璃层的表面上。感测元件和框架优选地由硅制成，并且界面膜优选为氮化硅。

8. 发明申请

US20190145592A1 SOLAR POWERED RECYCLING AND WASTE STATION 审中-公开
公开(公告)号：US20190145592A1
公开(公告)日：2019-05-16
申请号：US16231740
申请日：2018-12-24
申请人： Greg Lawson , Keith O. Warren , Keane O. Warren
发明人： Greg Lawson , Keith O. Warren , Keane O. Warren
IPC分类号： F21S9/03 , H02J7/35 , H02J7/04 , F21S8/08 , H02S40/38
摘要： A solar powered lighting system, and a method of controlling the system, the method including monitoring a voltage level of a solar panel in the solar powered lighting system, monitoring a voltage level of a battery in the solar powered lighting system, controlling the solar panel to charge the battery when the voltage level of the solar panel is above a predetermined charging threshold, controlling the battery to power one or more lights of the solar powered lighting system when the voltage level of the solar panel is below a predetermined charging threshold and the voltage level of the battery is above a predetermined operating threshold, and suspending powering of the one or more lights when the voltage level of the battery is below the predetermined operating threshold.

9. 发明授权

US5094969A Method for making a stackable multilayer substrate for mounting integrated circuits 失效
标题翻译：制造用于安装集成电路的可堆叠多层基板的方法
公开(公告)号：US5094969A
公开(公告)日：1992-03-10
申请号：US594373
申请日：1990-10-09
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： H01L23/00 , H01L23/13 , H01L23/538 , H01L25/065
CPC分类号： H01L23/562 , H01L23/13 , H01L23/5385 , H01L25/0652 , H01L2924/0002 , H01L2924/09701 , Y10T29/49126
摘要： A substrate is formed from a core substrate of flexible, low-temeprature co-fireable ceramic tape and an outer substrate of ceramic tape having apertures for receiving integrated circuits (ICs) therein. The substrate is heated the form a rigid body which then mounts the ICs. The rigid body and ICs are covered or at least partially covered with an insulating glass and heated to a temperature that fuses the glass but does not harm the ICs. The resulting structure hermetically seals the ICs in a single substrate that is insensitive to acceleration forces.
摘要翻译：基板由柔性低温共烧陶瓷带的芯基板和具有用于在其中接收集成电路（IC）的孔的陶瓷带的外基板形成。衬底被加热形成刚体，然后安装IC。刚体和IC被覆盖或至少部分地被绝缘玻璃覆盖并被加热到熔化玻璃而不损害IC的温度。所得到的结构将IC封装在对加速度不敏感的单个基板中。

10. 发明授权

US5006923A Stackable multilayer substrate for mounting integrated circuits 失效
标题翻译：用于安装集成电路的可堆叠多层基板
公开(公告)号：US5006923A
公开(公告)日：1991-04-09
申请号：US407045
申请日：1989-09-14
申请人： Keith O. Warren
发明人： Keith O. Warren
IPC分类号： H05K3/46 , H01L23/00 , H01L23/12 , H01L23/13 , H01L23/50 , H01L23/538 , H01L25/065
CPC分类号： H01L23/562 , H01L23/13 , H01L23/5385 , H01L25/0652 , H01L2924/0002 , H01L2924/09701
摘要： A substrate is formed from a core substrate of flexible, low-temperature co-fireable ceramic tape and an outer substrate of ceramic tape having apertures for receiving integrated circuits (ICs) therein. The substrate is heated to form a rigid body which then mounts the ICs. The rigid body and ICs are covered or at least partially covered with an insulating glass and heated to a temperature that fuses the glass but does not harm to ICs. The resulting structure hermetically seals the ICs in a single substrate that is insensitive to acceleration forces.

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