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1. 发明授权

US06723494B2 Conductor pattern and electronic component having the same 有权
标题翻译：导体图案和具有相同的电子部件
公开(公告)号：US06723494B2
公开(公告)日：2004-04-20
申请号：US09903792
申请日：2001-07-12
申请人： Yasuhiro Nakata , Keishiro Amaya
发明人： Yasuhiro Nakata , Keishiro Amaya
IPC分类号： G03F700
CPC分类号： H01F5/003 , G03F7/40 , H01F41/041 , H01L21/4867 , H01L23/49838 , H01L2924/0002 , H01L2924/09701 , H05K1/092 , H05K1/165 , H05K3/02 , H01L2924/00
摘要： A conductor pattern is constructed to prevent corners from peeling and raising off a substrate. The conductor pattern has a spiral configuration and includes straight lines and corners connected to the straight lines. The bottom surface cross-sectional width of the conductor pattern is smaller than the top surface cross-sectional width thereof. Moreover, the bottom surface cross-sectional width of the corner is larger than the bottom surface cross-sectional width of the straight line.
摘要翻译：构造导体图案以防止拐角脱落并抬高基板。导体图案具有螺旋形结构，并且包括连接到直线的直线和角部。导体图案的底面截面宽度小于其顶面横截面宽度。此外，角部的底面截面宽度大于直线的底面截面宽度。

2. 发明授权

US06555913B1 Electronic component having a coil conductor with photosensitive conductive paste 有权
标题翻译：电子部件具有带有感光性导电膏的线圈导体
公开(公告)号：US06555913B1
公开(公告)日：2003-04-29
申请号：US09350038
申请日：1999-07-08
申请人： Toshiya Sasaki , Kazuyoshi Uchiyama , Masahiko Kawaguchi , Keishiro Amaya , Eita Tamezawa
发明人： Toshiya Sasaki , Kazuyoshi Uchiyama , Masahiko Kawaguchi , Keishiro Amaya , Eita Tamezawa
IPC分类号： H01L2352
CPC分类号： H01F17/0013 , H01F41/043 , H01L27/08 , H05K1/092 , H05K1/165 , H05K3/02 , H05K3/4664
摘要： A small size electronic component has a small direct current resistance value of conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.
摘要翻译：小尺寸电子元件具有导体图案的小直流电阻值和导体图案的最小尺寸不规则性。为了形成这样一种组分，将一种感光性导电膏施加在陶瓷基片上，然后通过光掩模曝光并显影，以便形成一个线圈导体图案的下导体图形层。然后在陶瓷基板上涂覆绝缘膏，以覆盖下导体图案层，并用溶剂除去绝缘膏，直到下导体图案层的至少上表面露出以形成线间绝缘层。此外，在施加感光性导电性糊剂作为膜之后，在使用光掩模的同时再次进行曝光和显影操作，以在下导体图案层上形成上导体图案层。

3. 发明授权

US06538547B2 Chip inductor and manufacturing method therefor 有权
公开(公告)号：US06538547B2
公开(公告)日：2003-03-25
申请号：US09850952
申请日：2001-05-09
申请人： Eita Tamezawa , Keishiro Amaya
发明人： Eita Tamezawa , Keishiro Amaya
IPC分类号： H01F500
CPC分类号： H01L28/10 , H01F17/0013 , H01F41/041 , H01L27/08 , Y10T29/4902 , Y10T29/49117 , Y10T29/49155 , Y10T29/49789 , Y10T29/4979 , Y10T29/49792
摘要： A chip inductor has electrode layers, insulating layers disposed on the electrode layers, and an uppermost insulating layer all disposed on a ceramic board. An inorganic pigment such as a Co oxide or an Al oxide is added to the insulating layer at a concentration of from about 2% to about 20% by weight. Break grooves are formed in the form of a lattice on the insulating layer by a laser beam irradiation, and the board is divided along the grooves. By adding the inorganic pigment, the break grooves are effectively formed, and the mother board is divided accurately along the break grooves, such that a chip inductor having an increased L value and an increased Q value is produced.

4. 发明授权

US5973390A Chip electronic part 失效
标题翻译：芯片电子部件
公开(公告)号：US5973390A
公开(公告)日：1999-10-26
申请号：US921508
申请日：1997-09-02
申请人： Keishiro Amaya , Kenichi Aoki
发明人： Keishiro Amaya , Kenichi Aoki
IPC分类号： H01C17/06 , H01F27/29 , H01F41/04 , H01G4/252 , H01G13/00 , H01L23/02
CPC分类号： H01C1/14 , H01G4/12 , H01G4/228 , H01F17/03 , H01F27/292 , Y10S257/924
摘要： The present invention is a chip electronic part having: a ceramic member; a conductor pattern formed on the surface of the ceramic member; an insulating protective layer formed on the conductor pattern; an external electrode which is formed at least one end face of the ceramic member, electrically connected to the conductor pattern, and composed of an undercoating layer formed by dry plating and at least one plating layer formed by wet plating; and at least one groove formed near an end face of the insulating protective layer so as to limit the formation of the undercoating layer.
摘要翻译：本发明是一种芯片电子部件，具有：陶瓷部件; 形成在陶瓷构件的表面上的导体图案; 形成在导体图案上的绝缘保护层; 外部电极，其形成在所述陶瓷构件的至少一个端面上，与所述导体图案电连接，并且由通过干式电镀形成的底涂层和通过湿式电镀形成的至少一层电镀层构成; 以及在绝缘保护层的端面附近形成的至少一个槽，以限制底涂层的形成。

5. 发明授权

US06194248B1 Chip electronic part 有权
标题翻译：芯片电子部件
公开(公告)号：US06194248B1
公开(公告)日：2001-02-27
申请号：US09368160
申请日：1999-08-05
申请人： Keishiro Amaya , Kenichi Aoki
发明人： Keishiro Amaya , Kenichi Aoki
IPC分类号： H01L2144
CPC分类号： H01F41/041 , H01F17/0006 , H01F27/292 , H01G4/06 , Y10T29/4902
摘要： The present invention is a chip electronic part having: a ceramic member; a conductor pattern formed on the surface of the ceramic member; an insulating protective layer formed on the conductor pattern; an external electrode which is formed at least one end face of the ceramic member, electrically connected to the conductor pattern, and composed of an undercoating layer formed by dry plating and at least one plating layer formed by wet plating; and at least one groove formed near an end face of the insulating protective layer so as to limit the formation of the undercoating layer.
摘要翻译：本发明是一种芯片电子部件，具有：陶瓷部件; 形成在陶瓷构件的表面上的导体图案; 形成在导体图案上的绝缘保护层; 外部电极，其形成在所述陶瓷构件的至少一个端面上，与所述导体图案电连接，并且由通过干式电镀形成的底涂层和通过湿式电镀形成的至少一层电镀层构成; 以及在绝缘保护层的端面附近形成的至少一个槽，以限制底涂层的形成。

6. 发明授权

US07160770B2 Method of manufacturing an electronic component including an inter-line insulating layer and a conductor pattern 有权
标题翻译：制造包括线间绝缘层和导体图案的电子部件的方法
公开(公告)号：US07160770B2
公开(公告)日：2007-01-09
申请号：US10269588
申请日：2002-10-12
申请人： Toshiya Sasaki , Kazuyoshi Uchiyama , Masahiko Kawaguchi , Keishiro Amaya , Eita Tamezawa
发明人： Toshiya Sasaki , Kazuyoshi Uchiyama , Masahiko Kawaguchi , Keishiro Amaya , Eita Tamezawa
IPC分类号： H01L21/8234 , H01L21/8244
CPC分类号： H01F17/0013 , H01F41/043 , H01L27/08 , H05K1/092 , H05K1/165 , H05K3/02 , H05K3/4664
摘要： A small size electronic component has a small direct current resistance value of a conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.
摘要翻译：小尺寸电子元件具有导体图案的小直流电阻值和导体图案的最小尺寸不规则性。为了形成这样一种组分，将一种感光性导电膏施加在陶瓷基片上，然后通过光掩模曝光并显影，以便形成一个线圈导体图案的下导体图形层。然后在陶瓷基板上涂覆绝缘膏，以覆盖下导体图案层，并用溶剂除去绝缘膏，直到下导体图案层的至少上表面露出以形成线间绝缘层。此外，在施加感光性导电性糊剂作为膜之后，在使用光掩模的同时再次进行曝光和显影操作，以在下导体图案层上形成上导体图案层。

7. 发明授权

US06686825B2 Chip inductor and manufacturing method therefor 有权
标题翻译：片式电感及其制造方法
公开(公告)号：US06686825B2
公开(公告)日：2004-02-03
申请号：US10290377
申请日：2002-11-08
申请人： Eita Tamezawa , Keishiro Amaya
发明人： Eita Tamezawa , Keishiro Amaya
IPC分类号： H01H500
CPC分类号： H01L28/10 , H01F17/0013 , H01F41/041 , H01L27/08 , Y10T29/4902 , Y10T29/49117 , Y10T29/49155 , Y10T29/49789 , Y10T29/4979 , Y10T29/49792
摘要： A chip inductor has electrode layers, insulating layers disposed on the electrode layers, and an uppermost insulating layer all disposed on a ceramic board. An inorganic pigment such as a Co oxide or an Al oxide is added to the insulating layer at a concentration of from about 2% to about 20% by weight. Break grooves are formed in the form of a lattice on the insulating layer by a laser beam irradiation, and the board is divided along the grooves. By adding the inorganic pigment, the break grooves are effectively formed, and the mother board is divided accurately along the break grooves, such that a chip inductor having an increased L value and an increased Q value is produced.
摘要翻译：芯片电感器具有设置在电极层上的电极层，绝缘层和全部设置在陶瓷板上的最上层的绝缘层。将浓度为约2％至约20％重量的无机颜料如Co氧化物或Al氧化物加入到绝缘层中。通过激光束照射在绝缘层上形成格子形式的断裂槽，并且沿着沟槽分割板。通过添加无机颜料，有效地形成断裂槽，并且沿着断裂槽准确地划分母板，从而产生具有增加的L值和增加的Q值的片式电感器。

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