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热词
    • 3. 发明授权
    • Reset circuit
    • 复位电路
    • US5489863A
    • 1996-02-06
    • US330795
    • 1994-10-28
    • Keiko Saijo
    • Keiko Saijo
    • G06F11/30G06F1/24G06F11/00H03L7/00
    • G06F11/0754G06F1/24G06F11/0757
    • A test signal generator outputs a test signal synchronized with the data transmission of the CPU. The test signal is supplied concurrently to a comparator and to an input unit. The output signal of the input unit is then supplied to a line of an bus signal to be stored in a first storage unit. On the line of the bus signal, there is provided an LPF consisting of an resistance and an capacity. When transmission of the bus signal is delayed, the output signal of the comparator changes according to the timing of a clock. The changed output signal is immediately stored in a second storage unit to output a reset signal, thereby resetting the CPU.
    • 测试信号发生器输出与CPU的数据传输同步的测试信号。 测试信号同时提供给比较器和输入单元。 然后将输入单元的输出信号提供给要存储在第一存储单元中的总线信号的一行。 在总线信号线上,提供了一个由电阻和容量组成的LPF。 当总线信号的发送被延迟时,比较器的输出信号根据时钟的定时而变化。 改变的输出信号立即存储在第二存储单元中以输出复位信号,从而复位CPU。