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1. 发明授权

US08559163B2 Reaction vessel for producing capacitor element, production method for capacitor element, capacitor element and capacitor 有权
标题翻译：用于制造电容器元件的反应容器，电容器元件，电容器元件和电容器的制造方法
公开(公告)号：US08559163B2
公开(公告)日：2013-10-15
申请号：US11219731
申请日：2005-09-07
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/00
CPC分类号： H01G9/0036 , H01G9/028 , H01G11/56 , H01G11/82 , Y02E60/13
摘要： The present invention relates to a reaction vessel for producing a capacitor element, which is used for forming a semiconductor layer by means of energization on two or more electric conductors each having formed on the surface thereof a dielectric layer simultaneously, by immersing the electric conductors into an electrolyte in the reaction vessel, the vessel comprising two or more negative electrode plates corresponding to the individual electric conductors and two or more constant current sources electrically connected to each of the negative electrode plates; production method for a group of capacitor elements using the reaction vessel and a capacitor using the capacitor element. According to the present invention, a large number of capacitors which each uses a semiconductor layer as one part electrode with a narrow appearance capacitance distribution can be obtained simultaneously.
摘要翻译：本发明涉及一种用于制造电容器元件的反应容器，其用于通过在两个或更多个电导体上形成半导体层来形成半导体层，所述两个或多个电导体同时形成在其表面上的电介质层，通过将电导体浸入反应容器中的电解液，该容器包括对应于各个电导体的两个或多个负极板和与每个负极板电连接的两个或更多个恒流源; 使用反应容器的一组电容器元件的制造方法和使用电容器元件的电容器。根据本发明，可以同时获得大量使用半导体层作为具有窄外观电容分布的一部分电极的电容器。

2. 发明申请

US20110292573A1 SOLID ELECTROLYTIC CAPACITOR 有权
标题翻译：固体电解电容器
公开(公告)号：US20110292573A1
公开(公告)日：2011-12-01
申请号：US13142474
申请日：2009-12-28
申请人： Kazumi NAITO , Katutoshi Tamura
发明人： Kazumi NAITO , Katutoshi Tamura
IPC分类号： H01G9/048 , H01R43/16 , H01G9/00
CPC分类号： H01G9/012 , H01G9/10 , H01G9/15 , Y10T29/417 , Y10T29/49204
摘要： A solid electrolytic capacitor capable of assuredly connecting a lead terminal and a lead wire while increasing a capacity of a capacitor element is provided. The present invention is directed to a solid electrolytic capacitor in which a capacitor element 1 having a positive electrode lead wire 12 protruded from a front face of the capacitor element 1 and an positive electrode lead terminal 2 connected to the positive electrode lead wire 12 is sealed with an exterior sealing element of synthetic resin except for a part of the positive electrode lead terminal 2. The positive electrode lead terminal 2 is provided with a positive electrode base frame 21 arranged along a lower surface of the exterior sealing element 4 so as to correspond to the positive electrode lead wire 12, a raised connecting piece 22 arranged to extend upward from an edge of the positive electrode base frame 21 along a front end face and having an upper edge to which the positive electrode lead wire 12 is connected, and reinforcing pieces 23 provided at both side edges of the raised connecting piece 22 and arranged between both side edges of the positive electrode base frame 12.
摘要翻译：提供了一种能够在增加电容器元件的容量的同时可靠地连接引线端子和引线的固体电解电容器。本发明涉及一种固体电解电容器，其中具有从电容器元件1的正面突出的正极引线12和连接到正极引线12的正极引线端子2的电容器元件1被密封除了正极引线端子2的一部分之外，具有合成树脂的外部密封元件。正极引线端子2设置有沿着外部密封元件4的下表面布置的正极基座框架21，以对应于正极引线12是从正极基体框架21的边缘沿着前端面向上延伸并且具有连接有正极引线12的上边缘的升降连接片22，设置在凸起的连接片22的两个侧边缘处并且布置在正极基底框架的两个侧边缘之间的片23 e 12。

3. 发明授权

US07609505B2 Chip solid electrolyte capacitor and production method of the same 有权
标题翻译：芯片固体电解电容器及其制作方法相同
公开(公告)号：US07609505B2
公开(公告)日：2009-10-27
申请号：US10567759
申请日：2004-08-12
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01G9/028 , H01G9/052 , H01G9/14 , H01G9/15 , H01G9/26 , Y10T29/41 , Y10T29/417
摘要： The present invention relates to a resin-molded chip solid electrolyte capacitor comprising a plurality of solid electrolyte capacitor elements horizontally laid in parallel with no gap on a pair of oppositely disposed end parts of a lead frame, and a fixing layer which is extending across the plurality of capacitor elements and fixing the capacitor elements with each other; and having low equivalent series resistance (ESR) and low leakage current (LC value), a production method of the same and an electronic device using the capacitor.
摘要翻译：本发明涉及一种树脂成形芯片固体电解电容器，其包括在引线框架的一对相对设置的端部上没有间隙地水平放置的多个固体电解电容器元件，和固定层多个电容器元件并将电容器元件彼此固定; 具有低等效串联电阻（ESR）和低漏电流（LC值），其制造方法和使用电容器的电子器件。

4. 发明申请

US20060146481A1 Chip solid electrolyte capacitor 有权
标题翻译：芯片固体电解电容器
公开(公告)号：US20060146481A1
公开(公告)日：2006-07-06
申请号：US10547417
申请日：2004-03-02
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/04 , H01G9/145
CPC分类号： H01G9/042 , H01G9/012 , H01G9/10 , H01G9/15 , H01G9/26 , Y10T29/41 , Y10T29/417
摘要： A chip solid electrolyte capacitor with low ESR and small initial failure ratio comprising a plurality of solid electrolyte capacitor elements each produced by stacking a dielectric oxide film layer, a semiconductor layer and an electrically conducting layer in this order to form a cathode part on a surface of an anode substrate exclusive of the anode part at one end, the anode substrate comprising a sintered body of a valve-acting metal or an electrically conducting oxide or comprising the sintered body connected with a metal wire, which is a chip solid electrolyte capacitor obtained by horizontally laying the plurality of electrolyte capacitor elements in parallel with no space on a pair of oppositely disposed end parts of a lead frame such that the anode part or the metal wire and the cathode part come into contact with the lead frame, joining each element, and molding the entire with a resin while leaving outside the external terminal parts of the lead frame, wherein the volume ratio of one sintered body exclusive of the anode part to the chip volume is from 0.042 to 0.110; and an electronic instrument using the chip solid electrolyte capacitor.
摘要翻译：具有低ESR和小的初始故障率的芯片固体电解电容器包括多个固体电解电容器元件，每个固体电解电容器元件通过依次层叠电介质氧化物膜层，半导体层和导电层而在表面上形成阴极部分的阳极基板，其一端不包括阳极部分，阳极基板包括阀作用金属或导电氧化物的烧结体，或包括与作为芯片固体电解电容器的金属线连接的烧结体通过在引线框架的一对相对布置的端部的一对相对设置的端部处水平地放置多个电解电容器元件并排，没有空间，使得阳极部分或金属线和阴极部分与引线框架接触，，并用树脂模制整个，同时留下引线框架的外部端子部分，其中容积大鼠不包括阳极部分至芯片体积的一个烧结体的io为0.042至0.110; 以及使用该芯片固体电解电容器的电子仪器。

5. 发明申请

US20060051928A1 Reaction vessel for producing capacitor element, production method for capacitor element, capacitor element and capacitor 有权
公开(公告)号：US20060051928A1
公开(公告)日：2006-03-09
申请号：US11219731
申请日：2005-09-07
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01L21/20
CPC分类号： H01G9/0036 , H01G9/028 , H01G11/56 , H01G11/82 , Y02E60/13
摘要： The present invention relates to a reaction vessel for producing a capacitor element, which is used for forming a semiconductor layer by means of energization on two or more electric conductors each having formed on the surface thereof a dielectric layer simultaneously, by immersing the electric conductors into an electrolyte in the reaction vessel, the vessel comprising two or more negative electrode plates corresponding to the individual electric conductors and two or more constant current sources electrically connected to each of the negative electrode plates; production method for a group of capacitor elements using the reaction vessel and a capacitor using the capacitor element. According to the present invention, a large number of capacitors which each uses a semiconductor layer as one part electrode with a narrow appearance capacitance distribution can be obtained simultaneously.

6. 发明授权

US07819928B2 Jig for producing capacitor, production method for capacitor and capacitor 有权
标题翻译：制造电容器的夹具，电容器和电容器的制造方法
公开(公告)号：US07819928B2
公开(公告)日：2010-10-26
申请号：US10563880
申请日：2004-07-09
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/00
CPC分类号： H01G9/0029 , H01G9/04 , H01G9/15 , Y10T29/417
摘要： The present invention provides a capacitor production method where an electric conductor having a dielectric layer formed thereon is used as one electrode and a semiconductor layer is formed by energization to be the other electrode, comprising the energization performed through a constant current diode, and also provides a jig for producing capacitors, which is used for forming semiconductor layers by energization on two or more electric conductors each having formed on the surface thereof a dielectric layer, the jig comprising two or more current ejection-type constant current sources in accordance with the number of electric conductors, which current sources each has an output electrically connected in series with a connection terminal for the electric conductor. Use of the jig of the present invention, enables production of capacitors including semiconductor as one electrode with a small variation in the capacitance.
摘要翻译：本发明提供一种电容器的制造方法，其中，在其上形成有电介质层的导体用作一个电极，并且通过通电作为另一个电极形成半导体层，其包括通过恒流二极管进行的通电，并且还提供用于制造电容器的夹具，其用于通过在其表面上形成介电层的两个或更多个导电体上通电而形成半导体层，所述夹具包括两个或更多个根据数量的电流放电型恒流源的电导体，其电流源各自具有与用于导电体的连接端子串联电连接的输出。通过使用本发明的夹具，可以生产包括半导体的电容器作为电容变化小的一个电极。

7. 发明申请

US20090241311A2 JIG FOR PRODUCING CAPACITOR, PRODUCTION METHOD FOR CAPACITOR AND CAPACITOR 有权
标题翻译：用于生产电容器的电容器，电容器和电容器的生产方法
公开(公告)号：US20090241311A2
公开(公告)日：2009-10-01
申请号：US10563880
申请日：2006-06-26
申请人： Kazumi NAITO , Katutoshi TAMURA
发明人： Kazumi NAITO , Katutoshi TAMURA
IPC分类号： H01L21/288 , H01G9/00
CPC分类号： H01G9/0029 , H01G9/04 , H01G9/15
摘要： The present invention provides a capacitor production method where an electric conductor having a dielectric layer formed thereon is used as one electrode and a semiconductor layer is formed by energization to be the other electrode, comprising the energization performed through a constant current diode, and also provides a jig for producing capacitors, which is used for forming semiconductor layers by energization on two or more electric conductors each having formed on the surface thereof a dielectric layer, the jig comprising two or more current ejection-type constant current sources in accordance with the number of electric conductors, which current sources each has an output electrically connected in series with a connection terminal for the electric conductor. Use of the jig of the present invention, enables production of capacitors including semiconductor as one electrode with a small variation in the capacitance.
摘要翻译：本发明提供一种电容器的制造方法，其中，在其上形成有电介质层的导体用作一个电极，并且通过通电作为另一个电极形成半导体层，其包括通过恒流二极管进行的通电，并且还提供用于制造电容器的夹具，其用于通过在其表面上形成介电层的两个或更多个导电体上通电而形成半导体层，所述夹具包括两个或更多个根据数量的电流放电型恒流源的电导体，其电流源各自具有与用于导电体的连接端子串联电连接的输出。通过使用本发明的夹具，可以生产包括半导体的电容器作为电容变化小的一个电极。

8. 发明申请

US20090090997A1 SOLID ELECTROLYTIC CAPACITOR ELEMENT AND PRODUCTION METHOD THEREOF 审中-公开
标题翻译：固体电解电容器元件及其制造方法
公开(公告)号：US20090090997A1
公开(公告)日：2009-04-09
申请号：US11994381
申请日：2006-06-30
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01L21/20 , H01G9/15
CPC分类号： H01G9/0036 , H01G9/028 , H01G9/042 , H01G9/15
摘要： The present invention relates to a production method of solid electrolytic capacitor element, comprising a step of forming a semiconductor layer on a surface of a conductor having a dielectric oxide film thereon and having an anode lead connected thereto by conducting electrolytic oxidation-polymerization using pyrrole dimer at around room temperature, a solid electrolytic capacitor element produced by the method, solid electrolytic capacitor using the element and uses thereof. According to the invention, low-temperature polymerizability of pyrrole, which is inexpensive, can be suppressed, whereby the invention enables production of solid electrolytic capacitor elements having a semiconductor layer formed in industrially advantageous manner.
摘要翻译：固体电解电容器元件的制造方法技术领域本发明涉及一种固体电解电容器元件的制造方法，其特征在于，在使用吡咯二聚体进行电解氧化聚合的情况下，在其上具有电介质氧化膜的导体的表面上形成半导体层，在室温附近，通过该方法制造的固体电解电容器元件，使用该元件的固体电解电容器及其用途。根据本发明，可以抑制廉价的吡咯的低温聚合性，由此本发明能够生产具有以工业上有利的方式形成的半导体层的固体电解电容器元件。

9. 发明授权

US07265965B2 Capacitor element and carbon paste 有权
标题翻译：电容元件和碳膏
公开(公告)号：US07265965B2
公开(公告)日：2007-09-04
申请号：US11174578
申请日：2005-07-06
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/04 , H01G9/145
CPC分类号： H01G9/042 , H01G9/0425
摘要： The present invention provides a capacitor wherein increase in the ESR value after a high temperature loading test is mitigated.A capacitor element, comprising an electric conductor having formed on the surface thereof a dielectric layer as one electrode, and a semiconductor layer, carbon layer and electrode layer formed sequentially on the dielectric layer, which capacitor element is characterized in that the carbon layer contains a dopant; a carbon paste as a material of the capacitor element; a capacitor using the capacitor element; and an electronic circuit and an electronic device using the capacitor.
摘要翻译：本发明提供了一种电容器，其中缓解了高温负载试验后的ESR值的增加。一种电容器元件，包括在其表面上形成作为一个电极的电介质层的电导体以及在所述电介质层上依次形成的半导体层，碳层和电极层，所述电容器元件的特征在于，所述碳层包含掺杂剂作为电容器元件的材料的碳糊; 使用电容器元件的电容器; 以及使用该电容器的电子电路和电子装置。

10. 发明授权

US07218505B2 Chip solid electrolyte capacitor 有权
标题翻译：芯片固体电解电容器
公开(公告)号：US07218505B2
公开(公告)日：2007-05-15
申请号：US10547417
申请日：2004-03-02
申请人： Kazumi Naito , Katutoshi Tamura
发明人： Kazumi Naito , Katutoshi Tamura
IPC分类号： H01G9/00
CPC分类号： H01G9/042 , H01G9/012 , H01G9/10 , H01G9/15 , H01G9/26 , Y10T29/41 , Y10T29/417
摘要： A chip solid electrolyte capacitor with low ESR and small initial failure ratio comprising a plurality of solid electrolyte capacitor elements each produced by stacking a dielectric oxide film layer, a semiconductor layer and an electrically conducting layer in this order to form a cathode part on a surface of an anode substrate exclusive of the anode part at one end, the anode substrate comprising a sintered body of a valve-acting metal or an electrically conducting oxide or comprising the sintered body connected with a metal wire, which is a chip solid electrolyte capacitor obtained by horizontally laying the plurality of electrolyte capacitor elements in parallel with no space on a pair of oppositely disposed end parts of a lead frame such that the anode part or the metal wire and the cathode part come into contact with the lead frame, joining each element, and molding the entire with a resin while leaving outside the external terminal parts of the lead frame, wherein the volume ratio of one sintered body exclusive of the anode part to the chip volume is from 0.042 to 0.110; and an electronic instrument using the chip solid electrolyte capacitor.
摘要翻译：具有低ESR和小的初始故障率的芯片固体电解电容器包括多个固体电解电容器元件，每个固体电解电容器元件通过依次层叠电介质氧化物膜层，半导体层和导电层而在表面上形成阴极部分的阳极基板，其一端不包括阳极部分，阳极基板包括阀作用金属或导电氧化物的烧结体，或包括与作为芯片固体电解电容器的金属线连接的烧结体通过在引线框架的一对相对布置的端部的一对相对设置的端部处水平地放置多个电解电容器元件并排，没有空间，使得阳极部分或金属线和阴极部分与引线框架接触，，并用树脂模制整个，同时留下引线框架的外部端子部分，其中容积大鼠不包括阳极部分至芯片体积的一个烧结体的io为0.042至0.110; 以及使用该芯片固体电解电容器的电子仪器。

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