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1. 发明授权

US08446210B2 Electronic fuse system 有权
标题翻译：电子保险丝系统
公开(公告)号：US08446210B2
公开(公告)日：2013-05-21
申请号：US13082072
申请日：2011-04-07
申请人： Kai-Yin Liu
发明人： Kai-Yin Liu
IPC分类号： H01H37/76 , G01R31/07
CPC分类号： H01H37/761
摘要： An electronic fuse system includes: a pad, an electronic fuse circuit, a first switch circuit, and a control circuit. The pad is used for receiving a reference voltage. The electronic fuse circuit is used for changing a voltage level when a current signal passes. The first switch circuit is coupled between the pad and the electronic fuse circuit, for controlling the first switch circuit to be disabled or enabled according to a switch control signal. The control circuit, coupled to the first switch circuit is for transferring the switch control signal according a control signal and a lock signal.
摘要翻译：电子熔断器系统包括：焊盘，电子熔丝电路，第一开关电路和控制电路。该焊盘用于接收参考电压。电子熔丝电路用于当电流信号通过时改变电压电平。第一开关电路耦合在焊盘和电子熔丝电路之间，用于根据开关控制信号控制第一开关电路被禁用或使能。耦合到第一开关电路的控制电路用于根据控制信号和锁定信号传送开关控制信号。

2. 发明申请

US20120229940A1 INTEGRATED CIRCUIT HAVING ESD PROTECTION CAPABILITY 有权
标题翻译：具有防静电保护能力的集成电路
公开(公告)号：US20120229940A1
公开(公告)日：2012-09-13
申请号：US13401865
申请日：2012-02-22
申请人： Chien-Ming Wu , Kai-Yin Liu
发明人： Chien-Ming Wu , Kai-Yin Liu
IPC分类号： H02H9/04
CPC分类号： H02H9/046
摘要： The present invention provides an integrated circuit having a better ESD protection capability and capable of reducing a circuit layout area. The integrated circuit comprises: an internal circuit, a first pad, and at least a first impedance matching unit. The first impedance matching unit is coupled between the internal circuit and the first pad, and the first impedance matching unit comprises: a first switch unit and a first resistance unit. The first switch unit is coupled to the internal circuit, and the first resistance unit is coupled between the first switch unit and the first pad, wherein the first resistance unit has a first terminal and a second terminal. The first terminal is directly electrically connected to the first pad and the second terminal is coupled to the first switch unit.
摘要翻译：本发明提供一种具有更好的ESD保护能力并能够减少电路布局面积的集成电路。集成电路包括：内部电路，第一焊盘和至少第一阻抗匹配单元。第一阻抗匹配单元耦合在内部电路和第一焊盘之间，第一阻抗匹配单元包括：第一开关单元和第一电阻单元。第一开关单元耦合到内部电路，并且第一电阻单元耦合在第一开关单元和第一焊盘之间，其中第一电阻单元具有第一端子和第二端子。第一端子直接电连接到第一焊盘，第二端子耦合到第一开关单元。

3. 发明授权

US08861160B2 Integrated circuit having ESD protection capability 有权
标题翻译：具有ESD保护能力的集成电路
公开(公告)号：US08861160B2
公开(公告)日：2014-10-14
申请号：US13401865
申请日：2012-02-22
申请人： Chien-Ming Wu , Kai-Yin Liu
发明人： Chien-Ming Wu , Kai-Yin Liu
IPC分类号： H02H3/20 , H03K17/082 , H03K19/003 , H02H9/04
CPC分类号： H02H9/046
摘要： The present invention provides an integrated circuit having a better ESD protection capability and capable of reducing a circuit layout area. The integrated circuit comprises: an internal circuit, a first pad, and at least a first impedance matching unit. The first impedance matching unit is coupled between the internal circuit and the first pad, and the first impedance matching unit comprises: a first switch unit and a first resistance unit. The first switch unit is coupled to the internal circuit, and the first resistance unit is coupled between the first switch unit and the first pad, wherein the first resistance unit has a first terminal and a second terminal. The first terminal is directly electrically connected to the first pad and the second terminal is coupled to the first switch unit.
摘要翻译：本发明提供一种具有更好的ESD保护能力并能够减少电路布局面积的集成电路。集成电路包括：内部电路，第一焊盘和至少第一阻抗匹配单元。第一阻抗匹配单元耦合在内部电路和第一焊盘之间，第一阻抗匹配单元包括：第一开关单元和第一电阻单元。第一开关单元耦合到内部电路，并且第一电阻单元耦合在第一开关单元和第一焊盘之间，其中第一电阻单元具有第一端子和第二端子。第一端子直接电连接到第一焊盘，第二端子耦合到第一开关单元。

4. 发明授权

US08724680B2 Transceiver without using a crystal oscillator 有权
标题翻译：收发器不使用晶体振荡器
公开(公告)号：US08724680B2
公开(公告)日：2014-05-13
申请号：US13609275
申请日：2012-09-11
申请人： Ming-Feng Hsu , Kai-Yin Liu , Tzu-Han Hsu , Yuan-Jih Chu
发明人： Ming-Feng Hsu , Kai-Yin Liu , Tzu-Han Hsu , Yuan-Jih Chu
IPC分类号： H04B1/38 , H04L5/16
CPC分类号： H04L12/6418
摘要： A transceiver includes a transceiver and a clock generation unit. The clock generation unit includes a clock generator, a multiplexer, and a frequency difference detector. The transceiver exchanges data with a link partner according to a first clock generated by a phase-locked loop. The clock generator is used for generating and outputting a second clock. The multiplexer is used for receiving a calibration clock or a receiver clock of the link partner, and outputting the calibration clock or the receiver clock of the link partner. The frequency difference detector is used for generating a difference signal according to a difference between the calibration clock and the second clock, or a difference between the receiver clock of the link partner and the second clock. The clock generator adjusts the shift of the second clock according to the difference signal. The phase-locked loop generates the first clock according to the second clock.
摘要翻译：收发器包括收发器和时钟生成单元。时钟生成单元包括时钟发生器，多路复用器和频率差检测器。收发器根据由锁相环生成的第一时钟与链路伙伴交换数据。时钟发生器用于产生和输出第二个时钟。多路复用器用于接收链路伙伴的校准时钟或接收机时钟，并输出链路伙伴的校准时钟或接收机时钟。频差检测器用于根据校准时钟和第二时钟之间的差异或链路伙伴的接收机时钟与第二时钟之间的差产生差分信号。时钟发生器根据差信号调节第二时钟的移位。锁相环根据第二个时钟产生第一个时钟。

5. 发明申请

US20110248775A1 ELECTRONIC FUSE SYSTEM 有权
标题翻译：电子保险丝系统
公开(公告)号：US20110248775A1
公开(公告)日：2011-10-13
申请号：US13082072
申请日：2011-04-07
申请人： Kai-Yin Liu
发明人： Kai-Yin Liu
IPC分类号： H01H37/76
CPC分类号： H01H37/761
摘要： An electronic fuse system includes: a pad, an electronic fuse circuit, a first switch circuit, and a control circuit. The pad is used of receiving a reference voltage. The electronic fuse circuit is used of changing a voltage level when a current signal passes. The first switch circuit coupled between the pad and the electronic fuse circuit, for controlling the first switch circuit disabled or enabled according to a switch control signal. The control circuit, coupled to the first switch circuit, for transferring the switch control signal according a control signal and a lock signal. Wherein, when the lock signal is enabled, the control signal is unable to control the control circuit to turn on the first switch circuit.
摘要翻译：电子熔断器系统包括：焊盘，电子熔丝电路，第一开关电路和控制电路。该焊盘用于接收参考电压。电子熔丝电路用于当电流信号通过时改变电压电平。耦合在焊盘和电子熔丝电路之间的第一开关电路，用于根据开关控制信号控制第一开关电路被禁用或使能。控制电路，耦合到第一开关电路，用于根据控制信号和锁定信号传送开关控制信号。其中，当锁定信号被使能时，控制信号不能控制控制电路接通第一开关电路。

6. 发明授权

US08456221B2 Voltage operation system 有权
标题翻译：电压操作系统
公开(公告)号：US08456221B2
公开(公告)日：2013-06-04
申请号：US13087922
申请日：2011-04-15
申请人： Kai-Yin Liu
发明人： Kai-Yin Liu
IPC分类号： H01H37/76 , H03K17/18
CPC分类号： H03K17/22
摘要： A voltage operation system includes: a power on reset circuit, a voltage detecting circuit, an operating signal generating circuit, and an electronic fuse circuit. The power on reset circuit is used for generating a power on reset signal. The voltage detecting circuit detects an operating voltage to output a voltage detecting signal. The operating signal generating circuit, coupled to the power on reset circuit and the voltage detecting circuit-outputs an operating signal. The electronic fuse circuit can be fused according to a lock signal, a fuse signal, and the operating signal.
摘要翻译：电压操作系统包括：上电复位电路，电压检测电路，操作信号发生电路和电子熔丝电路。上电复位电路用于产生上电复位信号。电压检测电路检测工作电压以输出电压检测信号。耦合到上电复位电路和电压检测电路的操作信号发生电路输出操作信号。电子熔丝电路可以根据锁定信号，熔丝信号和操作信号进行熔断。

7. 发明申请

US20110254598A1 VOLTAGE OPERATION SYSTEM 有权
标题翻译：电压运行系统
公开(公告)号：US20110254598A1
公开(公告)日：2011-10-20
申请号：US13087922
申请日：2011-04-15
申请人： Kai-Yin LIU
发明人： Kai-Yin LIU
IPC分类号： H03L7/00
CPC分类号： H03K17/22
摘要： A voltage operation system is disclosed. The voltage operation system includes: a power on rest circuit, a voltage detecting circuit, an operating signal generating circuit, and an electronic fuse circuit. The power on rest circuit is used for generating a power on rest signal. The voltage detecting circuit detects an operating voltage to output a voltage detecting signal. The operating signal generating circuit, coupled to the power on rest circuit and the voltage detecting circuit, for outputting a operating signal. The electronic fuse circuit fuses or not according to a lock signal, a fuse signal, and the operating signal.
摘要翻译：公开了电压操作系统。电压操作系统包括：停电电路，电压检测电路，操作信号发生电路和电子熔丝电路。停电电路用于产生停电信号。电压检测电路检测工作电压以输出电压检测信号。操作信号发生电路，耦合到停电电路和电压检测电路，用于输出操作信号。电子熔丝电路根据锁定信号，熔丝信号和操作信号而熔断或不熔断。

8. 发明申请

US20130128933A1 TRANSCEIVER WITHOUT USING A CRYSTAL OSCILLATOR 有权
标题翻译：收发器不使用水晶振荡器
公开(公告)号：US20130128933A1
公开(公告)日：2013-05-23
申请号：US13609275
申请日：2012-09-11
申请人： Ming-Feng Hsu , Kai-Yin Liu , Tzu-Han Hsu , Yuan-Jih Chu
发明人： Ming-Feng Hsu , Kai-Yin Liu , Tzu-Han Hsu , Yuan-Jih Chu
IPC分类号： H04B1/40
CPC分类号： H04L12/6418
摘要： A transceiver includes a transceiver and a clock generation unit. The clock generation unit includes a clock generator, a multiplexer, and a frequency difference detector. The transceiver exchanges data with a link partner according to a first clock generated by a phase-locked loop. The clock generator is used for generating and outputting a second clock. The multiplexer is used for receiving a calibration clock or a receiver clock of the link partner, and outputting the calibration clock or the receiver clock of the link partner. The frequency difference detector is used for generating a difference signal according to a difference between the calibration clock and the second clock, or a difference between the receiver clock of the link partner and the second clock. The clock generator adjusts the shift of the second clock according to the difference signal. The phase-locked loop generates the first clock according to the second clock.
摘要翻译：收发器包括收发器和时钟生成单元。时钟生成单元包括时钟发生器，多路复用器和频率差检测器。收发器根据由锁相环生成的第一时钟与链路伙伴交换数据。时钟发生器用于产生和输出第二个时钟。多路复用器用于接收链路伙伴的校准时钟或接收机时钟，并输出链路伙伴的校准时钟或接收机时钟。频差检测器用于根据校准时钟和第二时钟之间的差异或链路伙伴的接收机时钟与第二时钟之间的差产生差分信号。时钟发生器根据差信号调节第二时钟的移位。锁相环根据第二个时钟产生第一个时钟。

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