专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110026213A1 MEMORY CARD WITH SATA CONNECTER 审中-公开
标题翻译：带SATA连接器的内存卡
公开(公告)号：US20110026213A1
公开(公告)日：2011-02-03
申请号：US12702255
申请日：2010-02-08
申请人： Kai-Shun Chang , Yu-Chieh Chang , Chi-Liang Tsai , Chien-Cheng Yu
发明人： Kai-Shun Chang , Yu-Chieh Chang , Chi-Liang Tsai , Chien-Cheng Yu
IPC分类号： G06F1/16 , H01R12/00
CPC分类号： G06F1/186 , H01R12/721
摘要： A memory card with a SATA connecter includes a SATA connector, a memory module, a controller, and a power control circuit. The SATA connector of the memory card is used for being connected with an electronic device. The SATA connector includes nine pins for receiving electric power, identifying a SATA interface signal, transmitting the SATA interface signal, and being connected with ground. The controller is electrically connected with the SATA connector and the memory module to control the data transmission between the memory card and the electronic device. The power control circuit is electrically connected with the connector, the memory module, and the controller to provide the electric power needed by the memory card.
摘要翻译：具有SATA连接器的存储卡包括SATA连接器，存储器模块，控制器和电源控制电路。存储卡的SATA连接器用于与电子设备连接。 SATA连接器包括9个用于接收电力的引脚，识别SATA接口信号，传输SATA接口信号，并与地连接。控制器与SATA连接器和存储器模块电连接，以控制存储卡和电子设备之间的数据传输。电源控制电路与连接器，存储器模块和控制器电连接以提供存储卡所需的电力。

2. 发明申请

US20050273590A1 Multiple over-clocking main board and control method thereof 审中-公开
标题翻译：多重超频主板及其控制方法
公开(公告)号：US20050273590A1
公开(公告)日：2005-12-08
申请号：US11142373
申请日：2005-06-02
申请人： Kai-Shun Chang
发明人： Kai-Shun Chang
IPC分类号： G06F1/04 , G06F1/08
CPC分类号： G06F1/08 , G06F1/04
摘要： A multiple over-clocking main board includes a CPU, a chipset and a clock-rate control-signal generating module. The CPU outputs a clock control signal. The chipset at least has a FSB circuit electrically connected to the CPU, and a PCIE bus circuit electrically connected to the FSB circuit. The clock-rate control-signal generating module electrically connected to the chipset generates a clock-rate control signal, which is inputted to the chipset. The chipset resets a transmission frequency ratio of an information transmission frequency of the FSB circuit to that of the PCIE bus circuit according to the clock-rate control signal.
摘要翻译：多个超时钟主板包括CPU，芯片组和时钟速率控制信号生成模块。 CPU输出时钟控制信号。该芯片组至少具有电连接到CPU的FSB电路，以及与FSB电路电连接的PCIE总线电路。电连接到芯片组的时钟速率控制信号产生模块产生输入到芯片组的时钟速率控制信号。芯片组根据时钟速率控制信号将FSB电路的信息发送频率与PCIE总线电路的信息发送频率的发送频率比重置。

3. 发明申请

US20060171131A1 Adapter module 有权
公开(公告)号：US20060171131A1
公开(公告)日：2006-08-03
申请号：US11339582
申请日：2006-01-26
申请人： Yueh-Chih Chen , Kai-Shun Chang
发明人： Yueh-Chih Chen , Kai-Shun Chang
IPC分类号： H05K7/10
CPC分类号： H05K7/1092 , H05K1/141 , H05K2201/049 , H05K2201/10325 , H05K2201/10704
摘要： An adapter module is described. The adapter module includes a circuit board, a first socket and an adapter device. One face of the first socket is electrically connected to the circuit board on the first face of the circuit. The other face of the first socket connects to a first central processing unit (CPU). One face of the adapter base is electrically connected to the circuit board on the second face of the circuit board. The other face of the adapter base connects to a second socket. The circuit board sends signals from the second socket, through the adapter base and the first socket, to the first CPU. When the adapter base is not connected to the second socket, the second socket is capable of connecting to a second kind of CPU.

4. 发明申请

US20060231289A1 Printed circuit board structure 审中-公开
标题翻译：印刷电路板结构
公开(公告)号：US20060231289A1
公开(公告)日：2006-10-19
申请号：US11402001
申请日：2006-04-12
申请人： Yueh-Chih Chen , Kai-Shun Chang
发明人： Yueh-Chih Chen , Kai-Shun Chang
IPC分类号： H05K7/06
CPC分类号： H05K1/0206 , H05K1/0209 , H05K2201/09327
摘要： A printed circuit board structure includes a signal reference layer exposed at the surface of the printed circuit board.
摘要翻译：印刷电路板结构包括在印刷电路板的表面露出的信号参考层。

5. 发明授权

US07558072B2 Adapter module 有权
标题翻译：适配器模块
公开(公告)号：US07558072B2
公开(公告)日：2009-07-07
申请号：US11339582
申请日：2006-01-26
申请人： Yueh-Chih Chen , Kai-Shun Chang
发明人： Yueh-Chih Chen , Kai-Shun Chang
IPC分类号： H01R12/16
CPC分类号： H05K7/1092 , H05K1/141 , H05K2201/049 , H05K2201/10325 , H05K2201/10704
摘要： An adapter module is described. The adapter module includes a circuit board, a first socket and an adapter device. One face of the first socket is electrically connected to the circuit board on the first face of the circuit. The other face of the first socket connects to a first central processing unit (CPU). One face of the adapter base is electrically connected to the circuit board on the second face of the circuit board. The other face of the adapter base connects to a second socket. The circuit board sends signals from the second socket, through the adapter base and the first socket, to the first CPU. When the adapter base is not connected to the second socket, the second socket is capable of connecting to a second kind of CPU.
摘要翻译：描述适配器模块。适配器模块包括电路板，第一插座和适配器装置。第一插座的一个面电连接到电路的第一面上的电路板。第一插座的另一面连接到第一中央处理单元（CPU）。适配器基座的一个面电连接到电路板的第二面上的电路板。适配器底座的另一面连接到第二个插座。电路板通过适配器底座和第一个插座将信号从第二个插座发送到第一个CPU。当适配器底座未连接到第二个插座时，第二个插座能够连接到第二种CPU。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式