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1. 发明申请

US20070083736A1 Instruction packer for digital signal processor 审中-公开
标题翻译：数字信号处理器指令包装机
公开(公告)号：US20070083736A1
公开(公告)日：2007-04-12
申请号：US11244564
申请日：2005-10-06
申请人： Aravindh Baktha , KS Venkatraman , Darrell Boggs
发明人： Aravindh Baktha , KS Venkatraman , Darrell Boggs
IPC分类号： G06F9/40
CPC分类号： G06F9/3857 , G06F9/30145 , G06F9/3017 , G06F9/3836 , G06F9/3838 , G06F9/3853 , G06F9/3855 , G06F9/3885
摘要： A digital signal processor which uses a RISC/CISC style front end and a VLIW style back end. Sequential ISA instructions are decoded into μops having a programmatic ordering. The μops are packed into a VLIW-like instruction packet according to a set of rules enforcing machine policy on e.g. data dependency, VLIW slot availability, maximum VLIW width, and so forth. Within the instruction packet, original program order is identified in case it is necessary to perform precise exception handling. The ISA code is executed as though it were on a RISC/CISC machine, but with VLIW style ILP efficiencies.
摘要翻译：数字信号处理器，采用RISC / CISC风格的前端和VLIW风格的后端。顺序ISA指令被解码成具有编程排序的muops。根据一组执行机器策略的规则，将muops打包成类VLIW指令包。数据依赖性，VLIW时隙可用性，最大VLIW宽度等。在指令包中，在需要执行精确异常处理的情况下，识别原始程序顺序。 ISA代码就像在RISC / CISC机器上一样执行，但是具有VLIW风格的ILP效率。

2. 发明授权

US07069424B2 Placing front instruction in replay loop to front to place side instruction into execution stream upon determination of criticality 失效
标题翻译：在确定关键性时，将前置指令放在重放循环中，将前置指令放置在执行流中
公开(公告)号：US07069424B2
公开(公告)日：2006-06-27
申请号：US10037023
申请日：2002-01-02
申请人： KS Venkatraman , Aravindh Baktha
发明人： KS Venkatraman , Aravindh Baktha
IPC分类号： G06F9/30
CPC分类号： G06F9/3836 , G06F9/3855 , G06F9/3861
摘要： A method and apparatus for whacking a μOP based upon the criticality of that μOP. Also disclosed are embodiments of a method for determining the criticality of a μOP.
摘要翻译：基于该muOP的关键性来打击muOP的方法和装置。还公开了用于确定muOP的关键性的方法的实施例。

3. 发明申请

US20050268074A1 Method and apparatus for determining the criticality of a micro-operation 审中-公开
标题翻译：用于确定微操作的关键性的方法和装置
公开(公告)号：US20050268074A1
公开(公告)日：2005-12-01
申请号：US11200677
申请日：2005-08-09
申请人： KS Venkatraman , Aravindh Bakthavathsalu
发明人： KS Venkatraman , Aravindh Bakthavathsalu
IPC分类号： G06F9/00 , G06F9/30 , G06F9/38
CPC分类号： G06F9/3836 , G06F9/3855 , G06F9/3861
摘要： A method and apparatus for whacking a μOP based upon the criticality of that μOP. Also disclosed are embodiments of a method for determining the criticality of a μOP.
摘要翻译：基于该muOP的关键性来打击muOP的方法和装置。还公开了用于确定muOP的关键性的方法的实施例。

4. 发明授权

US06775747B2 System and method for performing page table walks on speculative software prefetch operations 有权
标题翻译：用于在推测型软件预取操作上执行页面表的系统和方法
公开(公告)号：US06775747B2
公开(公告)日：2004-08-10
申请号：US10037665
申请日：2002-01-03
申请人： KS Venkatraman
发明人： KS Venkatraman
IPC分类号： G06F1200
CPC分类号： G06F12/10 , G06F9/3842 , G06F9/3851 , G06F9/3861 , G06F12/0862 , G06F2212/6028
摘要： A method and system are employed within a processor for performing page table walks on speculative software prefetch operations. The system includes a first fault register to store information associated with a faulting micro-op relating to a non-prefetch memory access operation and a second fault register to store information associated with a faulting micro-op relating to a prefetch memory access operation. Also included in the system is a first unit to determine whether a currently pending micro-op relates to a non-prefetch operation or a prefetch operation. The first unit is configured to drop the currently pending micro-op from a pipeline if (1) the currently pending micro-op relates to a prefetch memory access and (2) the currently pending micro-op has previously faulted.
摘要翻译：在处理器中采用方法和系统，用于在推测性软件预取操作上执行页表行走。该系统包括第一故障寄存器，用于存储与非预取存储器访问操作相关的故障微操作的信息，以及第二故障寄存器，用于存储与预取存储器访问操作相关的故障微操作相关的信息。还包括在系统中的是确定当前待定的微操作是否涉及非预取操作或预取操作的第一单元。如果（1）当前待处理的微操作与预取存储器访问相关，则第一单元被配置为从流水线中删除当前待处理的微操作;以及（2）当前待处理的微操作先前已经发生故障。

5. 发明申请

US20050216673A1 Method and apparatus handling locks 审中-公开
标题翻译：方法和设备处理锁
公开(公告)号：US20050216673A1
公开(公告)日：2005-09-29
申请号：US11131765
申请日：2005-05-17
申请人： Harish Kumar , Aravindh Baktha , Mike Upton , KS Venkatraman , Herbert Hum , Zhongying Zhang
发明人： Harish Kumar , Aravindh Baktha , Mike Upton , KS Venkatraman , Herbert Hum , Zhongying Zhang
IPC分类号： G06F9/312 , G06F9/318 , G06F9/38 , G06F12/08 , G06F12/00
CPC分类号： G06F9/3836 , G06F9/3004 , G06F9/30087 , G06F9/30181 , G06F9/30185 , G06F9/3834 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F12/0815
摘要： A method and device for determining an attribute associated with a locked load instruction and selecting a lock protocol based upon the attribute of the locked load instruction. Also disclosed is a method for concurrently executing the respective lock sequences associated with multiple threads of a processing device.
摘要翻译：一种用于确定与锁定的加载指令相关联的属性并基于所述锁定加载指令的属性来选择锁定协议的方法和装置。还公开了一种用于并行执行与处理装置的多个线程相关联的各个锁定序列的方法。

6. 发明授权

US06922745B2 Method and apparatus for handling locks 有权
标题翻译：处理锁的方法和装置
公开(公告)号：US06922745B2
公开(公告)日：2005-07-26
申请号：US10139215
申请日：2002-05-02
申请人： Harish Kumar , Aravindh Baktha , Mike D. Upton , KS Venkatraman , Herbert H. Hum , Zhongying Zhang
发明人： Harish Kumar , Aravindh Baktha , Mike D. Upton , KS Venkatraman , Herbert H. Hum , Zhongying Zhang
IPC分类号： G06F9/312 , G06F9/318 , G06F9/38 , G06F12/08 , G06F12/14
CPC分类号： G06F9/3836 , G06F9/3004 , G06F9/30087 , G06F9/30181 , G06F9/30185 , G06F9/3834 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F12/0815
摘要： A method and device for determining an attribute associated with a locked load instruction and selecting a lock protocol based upon the attribute of the locked load instruction. Also disclosed is a method for concurrently executing the respective lock sequences associated with multiple threads of a processing device.
摘要翻译：一种用于确定与锁定的加载指令相关联的属性并基于所述锁定加载指令的属性来选择锁定协议的方法和装置。还公开了一种用于并行执行与处理装置的多个线程相关联的各个锁定序列的方法。

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