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    • 1. 发明授权
    • Critical path deterministic execution of multithreaded applications in a transactional memory system
    • 交易内存系统中多线程应用程序的关键路径确定性执行
    • US08739163B2
    • 2014-05-27
    • US12402395
    • 2009-03-11
    • Luis CezeMark H. OskinJoseph Luke DeviettiBrandon Michael Lucia
    • Luis CezeMark H. OskinJoseph Luke DeviettiBrandon Michael Lucia
    • G06F9/46G06F13/00
    • G06F9/52G06F9/30087G06F11/3632
    • A hardware and/or software facility for controlling the order of operations performed by threads of a multithreaded application on a multiprocessing system is provided. The facility may serialize or selectively-serialize execution of the multithreaded application such that, given the same input to the multithreaded application, the multiprocessing system deterministically interleaves operations, thereby producing the same output each time the multithreaded application is executed. The facility divides the execution of the multithreaded application code into two or more quantum specifying a deterministic number of operations, and the facility specifies a deterministic order in which the threads execute the two or more quantum. The deterministic number of operations may be adapted to follow the critical path of the multithreaded application. Specified memory operations may be executed regardless of the deterministic order, such as those accessing provably local data. The facility may provide dynamic bug avoidance and sharing of identified bug information.
    • 提供了用于控制多线程应用程序的线程在多处理系统上执行的操作顺序的硬件和/或软件设施。 该设施可以串行化或选择性地串行化多线程应用的执行,使得在给多线程应用程序的相同输入时,多处理系统确定性地交织操作,从而在每次执行多线程应用程序时产生相同的输出。 该设施将多线程应用程序代码的执行划分为指定确定性操作数的两个或多个量子,并且该设施指定线程执行两个或更多个量子的确定性顺序。 可以将确定性的操作数量调整为遵循多线程应用程序的关键路径。 可以执行指定的存储器操作,而不管确定性顺序如访问可证明的本地数据的那些。 该设施可能会提供动态的错误回避和共享已识别的错误信息。
    • 2. 发明申请
    • EFFICIENT DETERMINISTIC MULTIPROCESSING
    • 有效的决策多媒体
    • US20090235262A1
    • 2009-09-17
    • US12402395
    • 2009-03-11
    • Luis CezeMark H. OskinJoseph Luke DeviettiBrandon Michael Lucia
    • Luis CezeMark H. OskinJoseph Luke DeviettiBrandon Michael Lucia
    • G06F9/46G06F9/44G06F12/00G06F17/00
    • G06F9/52G06F9/30087G06F11/3632
    • A hardware and/or software facility for controlling the order of operations performed by threads of a multithreaded application on a multiprocessing system is provided. The facility may serialize or selectively-serialize execution of the multithreaded application such that, given the same input to the multithreaded application, the multiprocessing system deterministically interleaves operations, thereby producing the same output each time the multithreaded application is executed. The facility divides the execution of the multithreaded application code into two or more quantum specifying a deterministic number of operations, and the facility specifies a deterministic order in which the threads execute the two or more quantum. The deterministic number of operations may be adapted to follow the critical path of the multithreaded application. Specified memory operations may be executed regardless of the deterministic order, such as those accessing provably local data. The facility may provide dynamic bug avoidance and sharing of identified bug information.
    • 提供了用于控制多线程应用程序的线程在多处理系统上执行的操作顺序的硬件和/或软件设施。 该设施可以串行化或选择性地串行化多线程应用的执行,使得在给多线程应用程序的相同输入时,多处理系统确定性地交织操作,从而在每次执行多线程应用程序时产生相同的输出。 该设施将多线程应用程序代码的执行划分为指定确定性操作数的两个或多个量子,并且该设施指定线程执行两个或更多个量子的确定性顺序。 可以将确定性的操作数量调整为遵循多线程应用程序的关键路径。 可以执行指定的存储器操作,而不管确定性顺序如访问可证明的本地数据的那些。 该设施可能会提供动态的错误回避和共享已识别的错误信息。