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    • 1. 发明授权
    • Flat-cell read-only memory
    • 平板只读存储器
    • US5663903A
    • 1997-09-02
    • US508532
    • 1995-07-28
    • Jeng-Jong Guo
    • Jeng-Jong Guo
    • G11C17/12
    • G11C17/126
    • The memory cells of a read-only memory are connected in parallel between adjacent bus-bit lines. The selection of tile sub-bit lines is through a selector logic decoder. The decoder has many rows of MOSFETs connected in series. Only one of MOSFETs in a row between an adjacent bit line bus and a virtual ground bus is active and controllable by a sub-word line selection signal with other MOSFETs non-conducting and connected between two adjacent sub-bit lines. These active MOSFETs in different rows are connected in series. One of these active MOSFETs is coupled to a main bit line, and another of these active MOSFETs is coupled to a virtual ground. When the active MOSFET is open, the main bit line signal and the virtual signal appear between the corresponding memory cells between these two corresponding sub-bit lines and are sensed. With this structure, the accessed memory cell is coupled between the main bit line and the virtual ground line through a number of series MOSFETs. These series MOSFETs isolate the memory cell from the main bit line, and reduces the undesirable transient lowering of the bit line signal due to parasitic capacitance which may otherwise give rise to error and slow down the speed.
    • 只读存储器的存储单元并联在相邻的总线位线之间。 瓦片子位线的选择是通过选择器逻辑解码器。 解码器具有串联连接的多行MOSFET。 相邻位线总线和虚拟接地总线之间的一行中只有一个MOSFET是有源的,并且可以通过一个子字线选择信号来控制,其他MOSFET不导通并连接在两个相邻的子位线之间。 这些不同行的有源MOSFET串联连接。 这些有源MOSFET中的一个耦合到主位线,并且这些有源MOSFET中的另一个耦合到虚拟地。 当有源MOSFET断开时,主位线信号和虚拟信号出现在这两个相应的子位线之间的相应存储单元之间并被感测。 利用这种结构,所访问的存储单元通过多个串联MOSFET耦合在主位线和虚拟接地线之间。 这些串联MOSFET将存储器单元与主位线隔离,并且由于寄生电容而导致的位线信号的不期望的瞬态降低,否则可能会引起误差并降低速度。
    • 2. 发明授权
    • Electronic musical instrument
    • 电子乐器
    • US4170160A
    • 1979-10-09
    • US914059
    • 1978-06-09
    • Jong Guo
    • Jong Guo
    • G10H1/20G10H5/00G10H5/06G10H5/10
    • G10H1/20G10H5/002Y10S84/08Y10S84/20
    • An electronic musical instrument includes a linear voltage divider network including a plurality of equal series resistance elements for generating a first output voltage as a function of the state of a plurality of tone select keys. This first voltage is converted to a second voltage which selectively varies exponentially as a function of the selected tone. The second voltage is compared with a ramp generator output to set and reset a latch which generates an audio frequency signal thereby. The audio frequency signal is coupled to an octave generator controlled by octave select keys for outputting the tone in a selected octave for output as sound via a speaker. Sharp and flat keys are also provided to cause the first voltage to vary in a way which emulates the functioning of a standard keyboard.
    • 电子乐器包括线性分压器网络,其包括多个相等的串联电阻元件,用于产生作为多个音调选择键的状态的函数的第一输出电压。 该第一电压被转换成第二电压,其选择性地按照所选音调的函数变化地变化。 将第二电压与斜坡发生器输出进行比较,以设置和复位产生音频信号的锁存器。 音频信号被耦合到由八度音阶选择键控制的八度发生器,用于输出所选择的八度音调中的音调,以便通过扬声器作为声音输出。 还提供了夏普和平键以使得第一电压以模拟标准键盘功能的方式变化。