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    • 1. 发明申请
    • Method, system, and product for isolating memory system defects to a particular memory system component
    • 用于将内存系统缺陷隔离到特定内存系统组件的方法,系统和产品
    • US20050060604A1
    • 2005-03-17
    • US10660006
    • 2003-09-11
    • Joel GoodwinManish MisraJohn Upton
    • Joel GoodwinManish MisraJohn Upton
    • G06F11/00G06F11/22H04L12/26
    • G01R31/318533G01R31/318597G11C5/04G11C29/56008G11C2029/0409
    • A method, system, and product are disclosed for isolating a defect in a memory system by determining in which particular component of the memory system the defect exists. The memory system includes multiple components. The components include a physical memory module, a memory card to which the physical memory module is attached, and a memory controller for controlling the memory card. The memory card includes one or more electrical buffers for driving or detecting the memory signals. The buffers may be used as virtual memory elements. Each component is tested separately in order to identify the defective component with the help of virtual memory system elements. The components are tested by first testing the physical memory module. If the physical memory module passes the test, the memory card is then tested. If the memory card passes its test, the memory controller is tested.
    • 公开了一种方法,系统和产品,用于通过确定存储系统的哪个特定部件存在缺陷来隔离存储器系统中的缺陷。 存储器系统包括多个组件。 这些组件包括物理存储器模块,物理存储器模块所连接的存储卡,以及用于控制存储卡的存储器控​​制器。 存储卡包括用于驱动或检测存储器信号的一个或多个电气缓冲器。 缓冲器可以用作虚拟存储器元件。 每个组件都被单独测试,以便借助虚拟内存系统元素识别有缺陷的组件。 通过首先测试物理内存模块来测试组件。 如果物理内存模块通过测试,则会对存储卡进行测试。 如果存储卡通过其测试,则对存储器控制器进行测试。
    • 3. 发明申请
    • I2C device including bus switches and programmable address
    • I2C器件包括总线开关和可编程地址
    • US20050097255A1
    • 2005-05-05
    • US10698065
    • 2003-10-30
    • Michael BarenysStephan BroylesRobert FaustJoel Goodwin
    • Michael BarenysStephan BroylesRobert FaustJoel Goodwin
    • G06F13/00G06F13/42
    • G06F13/4286
    • An I2C device is disclosed that includes a main I2C section, bus switches, switch logic, and address logic as part of the I2C device. The I2C device is coupled to an I2C bus for communicating with other I2C devices and an I2C bus controller that is also on the I2C bus. The switch logic controls a current position of the switches. The I2C device is coupled to the I2C bus utilizing the switches. The switches control whether the main I2C section, the address logic, the switch logic, or a combination of the main I2C section, address logic, and switch logic is currently coupled to I2C bus. The switches also can be used, if desired to remove from the buss all devices that are downstream from a given device containing switches. The address logic is used to receive and store the address of the I2C device. The I2C device will respond to the address that is stored in its address logic.
    • 公开了一种包括主I 2 C部分,总线开关,开关逻辑和作为I 2 2 C部分的地址逻辑的I < SUP> C设备。 I 2 C装置耦合到I 2 C总线,用于与其他I 2 C装置通信,以及I < / SUP> C总线控制器,也在I 2 C总线上。 开关逻辑控制开关的当前位置。 使用开关将I 2 SUPER C装置耦合到I 2 C总线。 开关控制主I 2 S区段,地址逻辑,开关逻辑或主I 2 SUP区段,地址逻辑和开关逻辑的组合 目前与I C> C总线相连。 如果需要从交换机的给定设备下游的所有设备中删除所有设备,也可以使用交换机。 地址逻辑用于接收和存储I 2 C设备的地址。 I 2 C设备将响应存储在其地址逻辑中的地址。