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    • 1. 发明授权
    • Integrated circuit memory devices having dummy memory cells therein for
inhibiting memory failures
    • 具有用于抑制存储器故障的虚拟存储器单元的集成电路存储器件
    • US5867434A
    • 1999-02-02
    • US912486
    • 1997-08-18
    • Chang-hag OhSang-seok KangJeon-hyung LeeJin-seok Lee
    • Chang-hag OhSang-seok KangJeon-hyung LeeJin-seok Lee
    • H01L27/10H01L27/108G11C7/00
    • H01L27/10897
    • Integrated circuit memory devices contain an array of active memory cells and at least one column of dummy memory cells having missing electrical connections to either a dummy bit line and/or respective storage electrodes. The dummy memory cells are provided with missing electrical connections so that formation of stray electrical "shorts" between storage electrodes of dummy and active memory cells during fabrication do not cause memory failures when the memory devices are installed. In particular, integrated circuit memory devices are provided which comprise an array of active DRAM memory cells and a column of dummy DRAM memory cells. The active DRAM memory cells each contain electrical connections to a respective active bit line and a respective storage electrode, but the dummy DRAM memory cells are each devoid of an electrical connection to a dummy bit line and/or a respective storage electrode. Accordingly, the formation of a stringer (e.g., electrical short) between a storage capacitor of an active memory cell and a dummy memory cell does not result in a memory failure even if the word line coupled to the dummy memory cell is activated and the dummy bit line is biased at a potential which is different from the potential of the storage capacitor of the active memory cell.
    • 集成电路存储器件包含有效存储器单元的阵列和至少一列虚拟存储器单元,其具有与虚拟位线和/或相应存储电极的缺失的电连接。 虚拟存储器单元被提供有缺失的电连接,使得在制造期间在虚拟存储单元和有源存储单元的存储电极之间形成杂散电“短路”在安装存储器件时不会引起存储器故障。 特别地,提供了包括有源DRAM存储器单元阵列和虚拟DRAM存储器单元的列的集成电路存储器件。 有源DRAM存储单元各自包含与相应的有源位线和相应的存储电极的电连接,但虚拟DRAM存储单元各自没有与虚拟位线和/或相应存储电极的电连接。 因此,即使连接到虚拟存储器单元的字线被激活,在活动存储单元的存储电容器和虚拟存储单元之间形成纵梁(例如电短路)也不会导致存储器故障,并且虚拟 位线偏置于与有源存储单元的存储电容器的电位不同的电位。