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1. 发明授权

US06715044B2 Device and method for controlling solid-state memory system 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US06715044B2
公开(公告)日：2004-03-30
申请号：US09939290
申请日：2001-08-22
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G06F1200
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solidstate memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件的阵列，其经由具有极少行的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。串行化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址寻址内存系统。

2. 发明授权

US5806070A Device and method for controlling solid-state memory system 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US5806070A
公开(公告)日：1998-09-08
申请号：US931193
申请日：1997-09-16
申请人： Robert D. Norman , Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Sanjay Mehrotra
发明人： Robert D. Norman , Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Sanjay Mehrotra
IPC分类号： G06F3/06 , G06F12/06 , G06F13/16 , G06F13/42 , G11C5/00 , G11C5/06 , G11C8/12 , G06F12/00
CPC分类号： G11C5/04 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G11C5/00 , G11C5/066 , G11C8/12 , Y02B60/1225 , Y02B60/1228 , Y02B60/1235
摘要： A memory system includes an array of solid-state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it. A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A particular multi-bit mount configuration is used to unconditionally select the device mounted thereon. A predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件的阵列，其经由具有极少线的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。序列化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个存储器件都安装在多位安装上，并通过它分配一个阵列地址。通过在设备总线上广播的适当地址来选择存储设备，而不需要通常的专用选择信号。使用特定的多位安装配置来无条件地选择安装在其上的设备。通过设备总线广播的预定义地址将取消所有先前选择的存储设备。通过读取流技术增强读取性能，其中当当前块的数据被串行化并从存储器件移出到控制器模块时，控制器模块还设置下一个数据块的地址以开始寻址内存系统。

3. 发明授权

US06317812B1 Device and method for controlling solid-state memory system 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US06317812B1
公开(公告)日：2001-11-13
申请号：US09657369
申请日：2000-09-08
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G06F1200
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solid-state memory devices are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is assigned an array address by an array mount. An memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array mount configuration is used to unconditionally select the device mounted. A reserved address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件阵列，其经由具有极少线路的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。序列化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个内存设备都由阵列装载分配一个阵列地址。通过在设备总线上广播的适当地址来选择存储设备，而不需要通常的专用选择信号。保留阵列安装配置用于无条件地选择安装的设备。通过设备总线广播的保留地址将取消所有先前选择的存储设备。通过读取流技术增强读取性能，其中当当前大量数据被序列化并从存储器子系统移出到控制器模块时，控制器模块还设置下一个数据块的地址以开始寻址内存系统。

4. 发明授权

US06148363A Device and method for controlling solid-state memory system 失效
公开(公告)号：US06148363A
公开(公告)日：2000-11-14
申请号：US64528
申请日：1998-04-21
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G06F3/06 , G06F12/06 , G06F13/16 , G06F13/42 , G11C5/00 , G11C5/06 , G11C8/12 , G06F12/00
CPC分类号： G11C5/04 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G11C5/00 , G11C5/066 , G11C8/12 , Y02B60/1225 , Y02B60/1228 , Y02B60/1235
摘要： A memory system includes an array of solid-state memory devices are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is assigned an array address by an array mount. An memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array mount configuration is used to unconditionally select the device mounted. A reserved address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.

5. 发明授权

US07688643B2 Device and method for controlling solid-state memory system 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US07688643B2
公开(公告)日：2010-03-30
申请号：US10809061
申请日：2004-03-24
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/04 , G06F13/00
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solidstate memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件的阵列，其经由具有极少行的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。串行化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址寻址内存系统。

6. 发明授权

US08125834B2 Device and method for controlling solid-state memory system 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US08125834B2
公开(公告)日：2012-02-28
申请号：US12619581
申请日：2009-11-16
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/04 , G06F13/00
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件的阵列，其经由具有极少线的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。串行化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址寻址内存系统。

7. 发明申请

US20100064098A1 Device and Method for Controlling Solid-State Memory System 失效
标题翻译：用于控制固态存储器系统的装置和方法
公开(公告)号：US20100064098A1
公开(公告)日：2010-03-11
申请号：US12619581
申请日：2009-11-16
申请人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
发明人： Karl M. J. Lofgren , Jeffrey Donald Stai , Anil Gupta , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G11C5/04 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F12/0676 , G06F13/1668 , G06F13/4243 , G11C5/00 , G11C5/066 , G11C8/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon. A reserved predefined address broadcast over the device bus deselects all previously selected memory devices. Read performance is enhanced by a read streaming technique in which while a current chunk of data is being serialized and shifted out of the memory subsystem devices to the controller module, the controller module is also setting up the address for the next chunk of data to begin to address the memory system.
摘要翻译：存储器系统包括固态存储器件的阵列，其经由具有极少线的器件总线与控制器模块通信并处于控制器模块的控制之下。这形成了集成电路大容量存储系统，其被设想来替代大容量存储系统，例如计算机系统中的磁盘驱动器存储器。命令，地址和数据信息被串行化为组件字符串，并在控制器模块和存储器件阵列之间传输之前被多路复用。串行化信息伴随着一个控制信号，以帮助整理复用的组件。阵列中的每个存储器件都安装在多位安装上，并通过阵列安装分配阵列地址。通过在设备总线上广播的适当地址来选择存储器件，而不需要通常的专用选择信号。使用保留阵列特定安装多位配置来无条件地选择安装在其上的装置。通过设备总线广播的保留的预定义地址取消选择所有先前选择的存储设备。读取性能通过读取流技术得到增强，其中当当前块的数据被序列化并从存储器子系统设备移出到控制器模块时，控制器模块还设置下一个数据块开始的地址寻址内存系统。

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