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    • 1. 发明授权
    • Symbol synchronization for communication
    • 符号同步通讯
    • US08503592B2
    • 2013-08-06
    • US13366827
    • 2012-02-06
    • Jeffrey C. Strait
    • Jeffrey C. Strait
    • H04L7/00
    • H04L27/2663H04L27/2665H04L27/2675H04L27/2679
    • A communication system and method is disclosed that performs symbol boundary synchronization by generating a symbol alignment estimate from a partial signal correlation; and then refining the symbol alignment estimate via a carrier phase calculation. To generate the symbol alignment estimate, two methods are disclosed. After an estimate is determined, an embodiment provides for refining the symbol alignment estimate via a carrier phase calculation by determining a carrier phase of two adjacent carriers, determining a phase error as directly proportional to an offset from the start of a symbol, determining a phase difference contribution due to a communication channel and device hardware, and counter-rotating the determined carrier phase by an angle of a constellation point at a transmitter.
    • 公开了一种通过从部分信号相关产生符号对准估计来执行符号边界同步的通信系统和方法; 然后通过载波相位计算来改进符号对准估计。 为了生成符号对齐估计,公开了两种方法。 在确定估计之后,实施例通过确定两个相邻载波的载波相位,经由载波相位计算来提炼符号对准估计,确定与从符号开始起的偏移成正比的相位误差,确定相位 由于通信信道和设备硬件导致的差异贡献,并且将所确定的载波相位反向旋转发射机处的星座点的角度。
    • 3. 发明授权
    • System and method for loading data onto carriers
    • 将数据载入载体的系统和方法
    • US06732281B1
    • 2004-05-04
    • US09583833
    • 2000-05-31
    • Ravi G. MantriJeffrey C. Strait
    • Ravi G. MantriJeffrey C. Strait
    • G06F126
    • H04L27/2608
    • A system and method for providing bit-loading enhancement is provided, including methods of determining an extended bit capacity for a plurality of carriers, wherein a first portion of the plurality of carriers is loaded and a second portion of the plurality of carriers is initially unloaded and bits are allocated between said first and second portions in accordance with power requirements for loading bits onto said first or second portion of the plurality of carriers, as well as methods of optimizing the average signal to noise margin for a plurality of carriers, wherein a first portion of the plurality of carriers is loaded and a second portion of the plurality of carriers is initially unloaded, and bits are loaded from the first portion onto the second portion in accordance with a power savings related to such a loading from the first portion onto the second portion.
    • 提供了一种用于提供比特加载增强的系统和方法,包括确定多个载波的扩展比特容量的方法,其中多个载波的第一部分被加载,并且多个载波的第二部分最初被卸载 并且根据用于将比特加载到所述多个载波的所述第一或第二部分上的功率要求,以及为多个载波优化平均信噪比的方法,在所述第一和第二部分之间分配比特,其中a 多个载体的第一部分被加载,并且多个载体的第二部分最初被卸载,并且根据与这种载荷相关的功率节省从第一部分将钻头从第一部分加载到第二部分上,从第一部分到 第二部分。
    • 6. 发明授权
    • Multicarrier transceiver
    • 多载波收发器
    • US07804906B2
    • 2010-09-28
    • US10979007
    • 2004-11-01
    • Terry C. BrownChristopher R. HansenJeffrey C. StraitRavi G. MantriFelician Bors
    • Terry C. BrownChristopher R. HansenJeffrey C. StraitRavi G. MantriFelician Bors
    • H04L27/28
    • H04L27/263H04L27/265
    • A multicarrier transceiver is disclosed that includes a digital signal processor with a plurality of memory locations, a direct memory, an encoder module coupled to receive data from the FIFO buffers, a decoder module coupled to receive data from the FIFO buffers, a Fourier transform module configured to perform an inverse Fast Fourier transform for transmit operations and to perform Fast Fourier transform (FFT) operations for receive operations, a plurality of distributed modules including the encoder module, the decoder module and the Fourier transform module, each module configured with a memory port, each memory port coupled to a peripheral bus and the DMA bus, a plurality of memory ports coupled to each of the distributed modules, the plurality of memory ports coupled to a peripheral bus, and a plurality of point-to-point buses coupled to each of the distributed modules, the point-to-point bus configured to enable data flow and testing and provide a bypass capability for each of the distributed modules.
    • 公开了一种多载波收发器,其包括具有多个存储器位置的数字信号处理器,直接存储器,耦合以从FIFO缓冲器接收数据的编码器模块,耦合以从FIFO缓冲器接收数据的解码器模块,傅里叶变换模块 被配置为执行用于发射操作的快速傅立叶反变换,并对接收操作执行快速傅里叶变换(FFT)操作,包括编码器模块,解码器模块和傅里叶变换模块的多个分布式模块,每个模块配置有存储器 端口,每个存储器端口耦合到外围总线和DMA总线,耦合到每个分布式模块的多个存储器端口,耦合到外围总线的多个存储器端口以及多个点对点总线耦合 对于每个分布式模块,点对点总线被配置为启用数据流和测试,并为t中的每一个提供旁路能力 他分发了模块。
    • 7. 发明授权
    • Symbol synchronization for communication
    • 符号同步通讯
    • US08675753B2
    • 2014-03-18
    • US13338677
    • 2011-12-28
    • Jeffrey C. Strait
    • Jeffrey C. Strait
    • H04K1/10
    • H04L27/2663H04L27/2665H04L27/2675H04L27/2679
    • A communication system and method is disclosed that performs symbol boundary synchronization by generating a symbol alignment estimate from a partial signal correlation; and then refining the symbol alignment estimate via a carrier phase calculation. To generate the symbol alignment estimate, two methods are disclosed. After an estimate is determined, an embodiment provides for refining the symbol alignment estimate via a carrier phase calculation by determining a carrier phase of two adjacent carriers, determining a phase error as directly proportional to an offset from the start of a symbol, determining a phase difference contribution due to a communication channel and device hardware, and counter-rotating the determined carrier phase by an angle of a constellation point at a transmitter.
    • 公开了一种通过从部分信号相关产生符号对准估计来执行符号边界同步的通信系统和方法; 然后通过载波相位计算来改进符号对准估计。 为了生成符号对齐估计,公开了两种方法。 在确定估计之后,实施例通过确定两个相邻载波的载波相位,经由载波相位计算来提炼符号对准估计,确定与从符号开始起的偏移成正比的相位误差,确定相位 由于通信信道和设备硬件导致的差异贡献,并且将所确定的载波相位反向旋转发射机处的星座点的角度。
    • 9. 发明授权
    • Method and apparatus for fault recovery in a decision feedback equalizer
    • 决策反馈均衡器中故障恢复的方法和装置
    • US06608864B1
    • 2003-08-19
    • US09320258
    • 1999-05-26
    • Jeffrey C. Strait
    • Jeffrey C. Strait
    • H04L2701
    • H04L25/03159H04L2025/03414H04L2025/03522H04L2025/03617H04L2025/03687
    • A method and apparatus for frequency domain equalization. The method and apparatus are particularly well suited for use in a receiver in a multicarrier transmission system that has predetermined symbols periodically embedded in the transmissions, such as in an ADSL system. The equalizer apparatus includes a digital filter having a plurality of single-tap filters. The filters operate on the symbols in the frequency domain, accepting frequency domain representations of the received symbols. The equalizer also includes a reference symbol generator that provides reference symbols, a coefficient generator that accepts the equalized frequency domain symbols from the digital filter and the reference symbols and updates the filter taps using a received predetermined symbol and the reference symbol. The coefficient generator includes a generator filter having a first and a second adaptation increment, an error generator, and a threshold detector that controls the coefficient generator in response to said error signal. Preferably, the threshold detector determines whether the equalizer output would have been decoded improperly during a synchronization symbol, and if so, enables the use of the second update increment in the generator filter.
    • 一种用于频域均衡的方法和装置。 该方法和装置特别适用于具有周期性地嵌入在传输中的预定符号的多载波传输系统中的接收机中,例如在ADSL系统中。 均衡器装置包括具有多个单抽头滤波器的数字滤波器。 滤波器对频域中的符号进行操作,接收接收符号的频域表示。 均衡器还包括提供参考符号的参考符号发生器,接收来自数字滤波器和参考符号的均衡频域符号的系数发生器,并且使用接收到的预定符号和参考符号来更新滤波器抽头。 系数发生器包括具有第一和第二自适应增量的发生器滤波器,误差发生器和响应于所述误差信号控制系数发生器的阈值检测器。 优选地,阈值检测器确定均衡器输出是否在同步符号期间被不正确地解码,并且如果是,则使能在生成器滤波器中使用第二更新增量。