会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Current-mode memory cell
    • 电流模式存储单元
    • US07495987B2
    • 2009-02-24
    • US11811547
    • 2007-06-11
    • Andre Luis Vilas BoasJefferson Daniel De Barros SolderaFabio De LacerdaAlfredo Olmos
    • Andre Luis Vilas BoasJefferson Daniel De Barros SolderaFabio De LacerdaAlfredo Olmos
    • G11C17/18
    • G11C17/18G11C17/16
    • Methods and corresponding systems for reading a memory cell include a first current sourced from a first current source into a summing node, wherein the first current source is coupled to a first reference. A second current is sourced from a second current source into the summing node, wherein the second current source is coupled to the first reference through a programmable fuse. A third current is sunk from the summing node with a current sink, wherein the current sink is coupled to a second reference, and wherein a third current limit is greater than a first current limit and less than the sum of the first current limit and the second current limit. A voltage at the summing node is output in response to the first current, the second current, and the third current. The first and second current sources, and the current sink can be current mirrors.
    • 用于读取存储器单元的方法和相应的系统包括从第一电流源进入求和节点的第一电流,其中第一电流源耦合到第一参考。 第二电流源自第二电流源到求和节点,其中第二电流源通过可编程保险丝耦合到第一参考。 第三电流从具有电流吸收器的求和节点沉没,其中电流吸收器耦合到第二参考,并且其中第三电流限制大于第一电流限制并且小于第一电流限制和 第二电流限制。 响应于第一电流,第二电流和第三电流输出求和节点处的电压。 第一和第二电流源,以及电流源可以是电流镜。
    • 3. 发明申请
    • Current-mode memory cell
    • 电流模式存储单元
    • US20080304348A1
    • 2008-12-11
    • US11811547
    • 2007-06-11
    • Andre Luis Vilas BoasJefferson Daniel De Barros SolderaFabio De LacerdaAlfredo Olmos
    • Andre Luis Vilas BoasJefferson Daniel De Barros SolderaFabio De LacerdaAlfredo Olmos
    • G11C17/16
    • G11C17/18G11C17/16
    • Methods and corresponding systems for reading a memory cell include a first current sourced from a first current source into a summing node, wherein the first current source is coupled to a first reference. A second current is sourced from a second current source into the summing node, wherein the second current source is coupled to the first reference through a programmable fuse. A third current is sunk from the summing node with a current sink, wherein the current sink is coupled to a second reference, and wherein a third current limit is greater than a first current limit and less than the sum of the first current limit and the second current limit. A voltage at the summing node is output in response to the first current, the second current, and the third current. The first and second current sources, and the current sink can be current mirrors.
    • 用于读取存储器单元的方法和相应的系统包括从第一电流源进入求和节点的第一电流,其中第一电流源耦合到第一参考。 第二电流源自第二电流源到求和节点,其中第二电流源通过可编程保险丝耦合到第一参考。 第三电流从具有电流吸收器的求和节点沉没,其中电流吸收器耦合到第二参考,并且其中第三电流限制大于第一电流限制并且小于第一电流限制和 第二电流限制。 响应于第一电流,第二电流和第三电流输出求和节点处的电压。 第一和第二电流源,以及电流源可以是电流镜。
    • 4. 发明授权
    • Device and technique for transistor well biasing
    • 晶体管阱偏置的器件和技术
    • US08164378B2
    • 2012-04-24
    • US12115825
    • 2008-05-06
    • Stefano PietriAlfredo OlmosJehoda RefaeliJefferson Daniel de Barros Soldera
    • Stefano PietriAlfredo OlmosJehoda RefaeliJefferson Daniel de Barros Soldera
    • H03K3/01H03K17/00
    • H03K5/2472G05F3/205G05F3/24H03K2217/0018
    • A method includes receiving a set of voltages comprising at least a first voltage, a second voltage, and a third voltage and biasing a well of a transistor based on the extreme voltage of the set of voltages. Biasing the well of the transistor can include concurrently providing a first signal and a second signal based on a comparison of the first voltage and the second voltage and selectively coupling the well of the transistor to a source of the extreme voltage of the set of voltages based on the first signal, the second signal, and the third voltage. An electronic device comprises a transistor and a power switching module. The power switching module includes a set of inputs, each input configured to receive a corresponding one of a set of voltages comprising at least a first voltage, a second voltage, and a third voltage, and includes an output coupled to a well of the transistor, the output configured to provide the extreme voltage of the set of voltages.
    • 一种方法包括接收包括至少第一电压,第二电压和第三电压的一组电压,并且基于该组电压的极限电压来偏置晶体管的阱。 偏置晶体管的阱可以包括基于第一电压和第二电压的比较同时提供第一信号和第二信号,并且选择性地将晶体管的阱耦合到该组电压的极值电压的源 第一信号,第二信号和第三电压。 电子设备包括晶体管和电源切换模块。 功率切换模块包括一组输入,每个输入被配置为接收包括至少第一电压,第二电压和第三电压的一组电压中的对应的一个,并且包括耦合到晶体管的阱的输出 ,所述输出被配置为提供所述一组电压的极限电压。