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1. 发明授权

US08769333B2 Application reliability and fault tolerant chip configurations 有权
标题翻译：应用可靠性和容错芯片配置
公开(公告)号：US08769333B2
公开(公告)日：2014-07-01
申请号：US13458802
申请日：2012-04-27
申请人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
IPC分类号： G06F11/00
CPC分类号： G06F11/0757 , G06F11/073 , G06F11/141
摘要： An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes. Creating a communication path between the application and the hardware registers would allow the application to modify the reliability of memory operations.
摘要翻译：应用程序可以通过应用程序和寄存器之间的通信路径指定可靠性值。如果应用程序本身可以指定超时和重试值，则应用可靠性可能会增加。例如，如果超时值延长了一小段时间，则可能会阻止某些错误。较长的超时值会导致性能降低，因为在超时期间无法访问内存组件。然而，解决内存设备中的错误将会阻止不可恢复的错误指示器返回到应用程序，这将反过来限制应用程序和系统崩溃。在应用程序和硬件寄存器之间创建通信路径将允许应用程序修改存储器操作的可靠性。

2. 发明申请

US20130007542A1 PREEMPTIVE MEMORY REPAIR BASED ON MULTI-SYMBOL, MULTI-SCRUB CYCLE ANALYSIS 失效
标题翻译：基于多符号的多播缓存循环分析进行的内存修复
公开(公告)号：US20130007542A1
公开(公告)日：2013-01-03
申请号：US13590998
申请日：2012-08-21
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
IPC分类号： G11C29/04 , G06F11/16
CPC分类号： G06F11/106
摘要： In some example embodiments, a method includes performing a memory scrub of a memory across a scrub cycle of multiple scrub cycles. The method includes identifying correctable errors of symbols in the memory that are a result of accesses from a section of the memory in response to the memory scrub. The method also includes performing an analysis across the multiple scrub cycles, wherein the performing of the analysis comprises determining whether at least two symbols across the multiple scrub cycles have at least one correctable error. The method includes responsive to determining that at least two symbols across the multiple scrub cycles have at least one correctable error, executing at least one repair of the memory that includes the section of memory.
摘要翻译：在一些示例性实施例中，一种方法包括在多个擦洗周期的擦洗循环之间执行存储器擦除。该方法包括识别作为响应于存储器擦除的来自存储器的一部分的访问的结果的存储器中的符号的可校正错误。该方法还包括在多个擦洗周期之间执行分析，其中分析的执行包括确定跨多个擦洗周期的至少两个符号是否具有至少一个可校正误差。该方法包括响应于确定跨多个擦洗周期的至少两个符号具有至少一个可校正错误，执行包括存储器部分的存储器的至少一次修复。

3. 发明申请

US20120185733A1 APPLICATION RELIABILITY AND FAULT TOLERANT CHIP CONFIGURATIONS 失效
公开(公告)号：US20120185733A1
公开(公告)日：2012-07-19
申请号：US13006231
申请日：2011-01-13
申请人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
IPC分类号： G06F11/07
CPC分类号： G06F11/0757 , G06F11/073 , G06F11/141
摘要： An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes. Creating a communication path between the application and the hardware registers would allow the application to modify the reliability of memory operations

4. 发明授权

US08539284B2 Application reliability and fault tolerant chip configurations 失效
标题翻译：应用可靠性和容错芯片配置
公开(公告)号：US08539284B2
公开(公告)日：2013-09-17
申请号：US13006231
申请日：2011-01-13
申请人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
IPC分类号： G06F11/00
CPC分类号： G06F11/0757 , G06F11/073 , G06F11/141
摘要： An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes. Creating a communication path between the application and the hardware registers would allow the application to modify the reliability of memory operations.
摘要翻译：应用程序可以通过应用程序和寄存器之间的通信路径指定可靠性值。如果应用程序本身可以指定超时和重试值，则应用可靠性可能会增加。例如，如果超时值延长了一小段时间，则可能会阻止某些错误。较长的超时值会导致性能降低，因为在超时期间无法访问内存组件。然而，解决内存设备中的错误将会阻止不可恢复的错误指示器返回到应用程序，这将反过来限制应用程序和系统崩溃。在应用程序和硬件寄存器之间创建通信路径将允许应用程序修改存储器操作的可靠性。

5. 发明授权

US08640006B2 Preemptive memory repair based on multi-symbol, multi-scrub cycle analysis 有权
标题翻译：基于多符号，多擦洗循环分析的抢占式内存修复
公开(公告)号：US08640006B2
公开(公告)日：2014-01-28
申请号：US13171675
申请日：2011-06-29
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
IPC分类号： G11C29/00
CPC分类号： G06F11/106
摘要： An apparatus includes a processor, a memory, and an error module operable on the processor. The error module is configured to perform a memory scrub of the memory across a scrub cycle of multiple scrub cycles. The error module is configured to identify correctable errors of symbols in the memory that are a result of accesses from a section of the memory in response to the memory scrub. The error module is configured to perform an analysis across the multiple scrub cycles, wherein the analysis comprises a determination whether at least two symbols across the multiple scrub cycles have at least one correctable error. The error module is configured to responsive to a determination that at least two symbols across the multiple scrub cycles have at least one correctable error, execute at least one repair of the memory that includes the section of memory.
摘要翻译：一种装置包括处理器，存储器和可在该处理器上操作的错误模块。错误模块被配置为在多个擦洗循环的擦洗循环中执行存储器擦除。错误模块被配置为识别存储器中的符号的可校正错误，其是响应于存储器擦除从存储器的一部分访问的结果。错误模块被配置为在多个擦洗周期之间执行分析，其中分析包括确定跨多个擦洗周期的至少两个符号是否具有至少一个可校正误差。错误模块被配置为响应于确定跨多个擦洗周期的至少两个符号具有至少一个可校正错误，执行包括存储器部分的存储器的至少一次修复。

6. 发明授权

US08484521B2 Firmware monitoring of memory scrub coverage 失效
标题翻译：内存擦除覆盖的固件监控
公开(公告)号：US08484521B2
公开(公告)日：2013-07-09
申请号：US13081627
申请日：2011-04-07
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual
IPC分类号： G11C29/00
CPC分类号： G11C29/52 , G06F11/106 , G11C2029/0409 , G11C2029/0411
摘要： Mechanisms are provided in which firmware verifies he entire system's memory scrub coverage through some additional memory controller (MC) registers/attentions and builds up a processor runtime diagnostic (PRD) scrub coverage table during every scrub cycle. Firmware may go through the scrub coverage table rank-by-rank on a periodic basis to determine whether any ranks had not been covered by hardware scrubbing. Firmware may initiate a targeted scrub and diagnostic for all of the ranks that did not have adequate scrub coverage. If for some reason the system still has some memory ranks that have not been covered by the initial hardware scrub and the targeted scrub, then the firmware may perform some course of action for fault isolation.
摘要翻译：提供了机制，其中固件通过一些额外的存储器控制器（MC）寄存器/注意力来验证整个系统的存储器擦除覆盖，并在每个擦除周期期间建立处理器运行时诊断（PRD）擦除覆盖表。固件可以定期地逐级浏览擦洗覆盖表，以确定是否有任何等级没有被硬件擦除覆盖。固件可能针对没有足够清洁覆盖的所有队伍启动针对性的擦洗和诊断。如果由于某些原因，系统仍然具有一些尚未被初始硬件擦除和目标擦除覆盖的内存级别，则固件可能会执行某些故障隔离操作。

7. 发明申请

US20120260139A1 Firmware Monitoring of Memory Scrub Coverage 失效
标题翻译：内存清理覆盖的固件监控
公开(公告)号：US20120260139A1
公开(公告)日：2012-10-11
申请号：US13081627
申请日：2011-04-07
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual
IPC分类号： G11C29/04 , G06F11/22
CPC分类号： G11C29/52 , G06F11/106 , G11C2029/0409 , G11C2029/0411
摘要： Mechanisms are provided in which firmware verifies he entire system's memory scrub coverage through some additional memory controller (MC) registers/attentions and builds up a processor runtime diagnostic (PRD) scrub coverage table during every scrub cycle. Firmware may go through the scrub coverage table rank-by-rank on a periodic basis to determine whether any ranks had not been covered by hardware scrubbing. Firmware may initiate a targeted scrub and diagnostic for all of the ranks that did not have adequate scrub coverage. If for some reason the system still has some memory ranks that have not been covered by the initial hardware scrub and the targeted scrub, then the firmware may perform some course of action for fault isolation.
摘要翻译：提供了机制，其中固件通过一些额外的存储器控制器（MC）寄存器/注意力来验证整个系统的存储器擦除覆盖，并在每个擦除周期期间建立处理器运行时诊断（PRD）擦除覆盖表。固件可以定期地逐级浏览擦洗覆盖表，以确定是否有任何等级没有被硬件擦除覆盖。固件可能针对没有足够清洁覆盖的所有队伍启动针对性的擦洗和诊断。如果由于某些原因，系统仍然具有一些尚未被初始硬件擦除和目标擦除覆盖的内存级别，则固件可能会执行某些故障隔离操作。

8. 发明授权

US08689080B2 Preemptive memory repair based on multi-symbol, multi-scrub cycle analysis 失效
标题翻译：基于多符号，多擦洗循环分析的抢占式内存修复
公开(公告)号：US08689080B2
公开(公告)日：2014-04-01
申请号：US13590998
申请日：2012-08-21
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
IPC分类号： G11C29/00
CPC分类号： G06F11/106
摘要： In some example embodiments, a method includes performing a memory scrub of a memory across a scrub cycle of multiple scrub cycles. The method includes identifying correctable errors of symbols in the memory that are a result of accesses from a section of the memory in response to the memory scrub. The method also includes performing an analysis across the multiple scrub cycles, wherein the performing of the analysis comprises determining whether at least two symbols across the multiple scrub cycles have at least one correctable error. The method includes responsive to determining that at least two symbols across the multiple scrub cycles have at least one correctable error, executing at least one repair of the memory that includes the section of memory.
摘要翻译：在一些示例性实施例中，一种方法包括在多个擦洗周期的擦洗循环之间执行存储器擦除。该方法包括识别作为响应于存储器擦除的来自存储器的一部分的访问的结果的存储器中的符号的可校正错误。该方法还包括在多个擦洗周期之间执行分析，其中分析的执行包括确定跨多个擦洗周期的至少两个符号是否具有至少一个可校正误差。该方法包括响应于确定跨多个擦洗周期的至少两个符号具有至少一个可校正错误，执行包括存储器部分的存储器的至少一次修复。

9. 发明申请

US20130007541A1 PREEMPTIVE MEMORY REPAIR BASED ON MULTI-SYMBOL, MULTI-SCRUB CYCLE ANALYSIS 有权
标题翻译：基于多符号的多播缓存循环分析进行的内存修复
公开(公告)号：US20130007541A1
公开(公告)日：2013-01-03
申请号：US13171675
申请日：2011-06-29
申请人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Marc A. Gollub , Anshuman Khandual , Jyotindra Patel
IPC分类号： H03M13/05 , G11C29/52 , G06F11/10
CPC分类号： G06F11/106
摘要： An apparatus includes a processor, a memory, and an error module operable on the processor. The error module is configured to perform a memory scrub of the memory across a scrub cycle of multiple scrub cycles. The error module is configured to identify correctable errors of symbols in the memory that are a result of accesses from a section of the memory in response to the memory scrub. The error module is configured to perform an analysis across the multiple scrub cycles, wherein the analysis comprises a determination whether at least two symbols across the multiple scrub cycles have at least one correctable error. The error module is configured to responsive to a determination that at least two symbols across the multiple scrub cycles have at least one correctable error, execute at least one repair of the memory that includes the section of memory.
摘要翻译：一种装置包括处理器，存储器和可在该处理器上操作的错误模块。错误模块被配置为在多个擦洗循环的擦洗循环中执行存储器擦除。错误模块被配置为识别存储器中的符号的可校正错误，其是响应于存储器擦除从存储器的一部分访问的结果。错误模块被配置为在多个擦洗周期之间执行分析，其中分析包括确定跨多个擦洗周期的至少两个符号是否具有至少一个可校正误差。错误模块被配置为响应于确定跨多个擦洗周期的至少两个符号具有至少一个可校正错误，执行包括存储器部分的存储器的至少一次修复。

10. 发明申请

US20120216068A1 APPLICATION RELIABILITY AND FAULT TOLERANT CHIP CONFIGURATIONS 有权
标题翻译：应用可靠性和容错芯片配置
公开(公告)号：US20120216068A1
公开(公告)日：2012-08-23
申请号：US13458802
申请日：2012-04-27
申请人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
发明人： Jay W. Carman , Anshuman Khandual , Jyotindra Patel
IPC分类号： G06F11/00 , G06F11/07
CPC分类号： G06F11/0757 , G06F11/073 , G06F11/141
摘要： An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes. Creating a communication path between the application and the hardware registers would allow the application to modify the reliability of memory operations
摘要翻译：应用程序可以通过应用程序和寄存器之间的通信路径指定可靠性值。如果应用程序本身可以指定超时和重试值，则应用可靠性可能会增加。例如，如果超时值延长了一小段时间，则可能会阻止某些错误。较长的超时值会导致性能降低，因为在超时期间无法访问内存组件。然而，解决内存设备中的错误将会阻止不可恢复的错误指示器返回到应用程序，这将反过来限制应用程序和系统崩溃。在应用程序和硬件寄存器之间创建通信路径将允许应用程序修改存储器操作的可靠性

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