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1. 发明授权

US07823141B1 Using a concurrent partial inspector loop with speculative parallelism 有权
标题翻译：使用并发部分检查器循环与推测并行
公开(公告)号：US07823141B1
公开(公告)日：2010-10-26
申请号：US11240963
申请日：2005-09-30
申请人： Phyllis E. Gustafson , Michael H. Paleczny , Christopher A. Vick , Olaf Manczak , Jay R. Freeman , Yuguang Wu
发明人： Phyllis E. Gustafson , Michael H. Paleczny , Christopher A. Vick , Olaf Manczak , Jay R. Freeman , Yuguang Wu
IPC分类号： G06F9/45 , G06F9/30 , G06F7/38
CPC分类号： G06F9/3851 , G06F8/456 , G06F9/325 , G06F9/3834 , G06F9/3861 , G06F9/3885 , G06F9/5066
摘要： A method for executing a loop in an application that includes executing iterations in a first segment of the loop by a base thread, logging memory transactions that occur during execution of iterations in the first segment by a co-inspector thread to obtain a co-inspector log, executing iterations in a second segment of the loop by a co-thread to obtain temporary results, logging memory transactions that occur during execution of iterations in the second segment to obtain a co-thread log, and comparing the co-inspector log and the co-thread log to determine whether a thread interdependency exists.
摘要翻译：一种用于在应用程序中执行循环的方法，包括：通过基线程执行所述循环的第一段中的迭代，记录由共检查者线程执行所述第一段中的迭代执行期间发生的存储器事务，以获得共检查器记录，通过共线程在循环的第二段中执行迭代以获得临时结果，记录在执行第二段中的迭代期间发生的存储器事务以获得共线程日志，并将协同检查器日志和共线程日志来确定是否存在线程相互依赖关系。

2. 发明授权

US07516361B2 Method for automatic checkpoint of system and application software 有权
标题翻译：系统和应用软件自动检查点的方法
公开(公告)号：US07516361B2
公开(公告)日：2009-04-07
申请号：US11332252
申请日：2006-01-13
申请人： Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Lawrence G. Votta, Jr.
发明人： Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Lawrence G. Votta, Jr.
IPC分类号： G06F11/00
CPC分类号： G06F11/1438 , G06F9/3863
摘要： A method for checkpointing a system that includes receiving a stop command by an executing thread from a master, wherein the executing thread executes an operating system, continuing execution of the executing thread until a checkpoint is reached after receiving the stop command, halting execution of the executing thread at the checkpoint, and checkpointing the system by storing a state and a snapshot of memory.
摘要翻译：一种用于检查系统的方法，包括从主机接收执行线程的停止命令，其中执行线程执行操作系统，继续执行执行的线程，直到在接收到停止命令之后到达检查点，停止执行在检查点执行线程，并通过存储内存的状态和快照检查系统。

3. 发明授权

US07478119B2 System and method for transposing memory patterns within the physical memory space 有权
标题翻译：在物理存储器空间内转移存储器模式的系统和方法
公开(公告)号：US07478119B2
公开(公告)日：2009-01-13
申请号：US11480703
申请日：2006-07-03
申请人： Michael H. Paleczny , Olaf Manczak , Christopher A. Vick , Jay R. Freeman , Phyllis E. Gustafson
发明人： Michael H. Paleczny , Olaf Manczak , Christopher A. Vick , Jay R. Freeman , Phyllis E. Gustafson
IPC分类号： G06F12/00
CPC分类号： G06F12/10 , G06F12/109 , Y10S707/99953 , Y10S707/99957
摘要： A system for mapping memory of a computer system includes a sorter, a partitioner, and a mapper. The sorter sorts a physical memory space to obtain a sorted virtual memory space, where the physical memory space includes a plurality of memory patterns, wherein each of the plurality of memory patterns is associated with a physical device and includes at least one memory block, wherein the at least one memory block is contiguous and addressable, and the plurality of memory patterns are arranged based on a predefined number of occurrences of each memory pattern, size of contiguous memory address ranges in each of the plurality of memory patterns, size of contiguous memory address ranges in each of the plurality of memory patterns, and arrangement of contiguous address ranges in each of the plurality of memory patterns. The partitioner partitions the plurality of memory patterns in the sorted memory space based on a partition size to obtain a partitioned virtual memory space, and a mapper transposes the partitioned virtual memory space to obtain a system memory space used by the computer system.
摘要翻译：用于映射计算机系统的存储器的系统包括分类器，分割器和映射器。分类器对物理存储器空间进行排序以获得分类的虚拟存储器空间，其中物理存储器空间包括多个存储器模式，其中多个存储器模式中的每一个与物理设备相关联并且包括至少一个存储块，其中所述至少一个存储器块是连续的和可寻址的，并且所述多个存储器模式基于每个存储器模式的预定数量的出现，多个存储器模式中的每一个中的连续存储器地址范围的大小，连续存储器的大小多个存储器模式中的每一个中的地址范围，以及在多个存储器模式的每一个中布置连续的地址范围。分割器基于分区大小对分类存储器空间中的多个存储器模式进行分区以获得分区虚拟存储器空间，并且映射器转置分区虚拟存储器空间以获得计算机系统使用的系统存储器空间。

4. 发明申请

US20080005526A1 Local contiguous memory space reservation and memory holes elimination 有权
标题翻译：本地连续的内存空间预留和内存空穴消除
公开(公告)号：US20080005526A1
公开(公告)日：2008-01-03
申请号：US11480703
申请日：2006-07-03
申请人： Michael H. Paleczny , Olaf Manczak , Christopher A. Vick , Jay R. Freeman , Phyllis E. Gustafson
发明人： Michael H. Paleczny , Olaf Manczak , Christopher A. Vick , Jay R. Freeman , Phyllis E. Gustafson
IPC分类号： G06F12/00
CPC分类号： G06F12/10 , G06F12/109 , Y10S707/99953 , Y10S707/99957
摘要： A system for mapping memory of a computer system includes a sorter, a partitioner, and a mapper. The sorter sorts a physical memory space to obtain a sorted virtual memory space, where the physical memory space includes a plurality of memory patterns, wherein each of the plurality of memory patterns is associated with a physical device and includes at least one memory block, wherein the at least one memory block is contiguous and addressable, and the plurality of memory patterns are arranged based on a predefined number of occurrences of each memory pattern, size of contiguous memory address ranges in each of the plurality of memory patterns, size of contiguous memory address ranges in each of the plurality of memory patterns, and arrangement of contiguous address ranges in each of the plurality of memory patterns. The partitioner partitions the plurality of memory patterns in the sorted memory space based on a partition size to obtain a partitioned virtual memory space, and a mapper transposes the partitioned virtual memory space to obtain a system memory space used by the computer system.
摘要翻译：用于映射计算机系统的存储器的系统包括分类器，分割器和映射器。分类器对物理存储器空间进行排序以获得分类的虚拟存储器空间，其中物理存储器空间包括多个存储器模式，其中多个存储器模式中的每一个与物理设备相关联并且包括至少一个存储块，其中所述至少一个存储器块是连续的和可寻址的，并且所述多个存储器模式基于每个存储器模式的预定数量的出现，多个存储器模式中的每一个中的连续存储器地址范围的大小，连续存储器的大小，多个存储器模式中的每一个中的地址范围，以及在多个存储器模式的每一个中布置连续的地址范围。分割器基于分区大小对分类存储器空间中的多个存储器模式进行分区以获得分区虚拟存储器空间，并且映射器转置分区虚拟存储器空间以获得计算机系统使用的系统存储器空间。

5. 发明授权

US07224689B2 Method and apparatus for routing of messages in a cycle-based system 有权
标题翻译：在基于循环的系统中路由消息的方法和装置
公开(公告)号：US07224689B2
公开(公告)日：2007-05-29
申请号：US10197451
申请日：2002-07-17
申请人： Jay R. Freeman
发明人： Jay R. Freeman
IPC分类号： H04L12/58
CPC分类号： H04L45/06
摘要： A method for routing a message from a source node to a destination node, where the source node and the destination node are connected by a plurality of nodes in a cycle-based system, is disclosed. The method includes generating a maze data structure including the plurality of nodes, where each of the plurality of nodes is associated with a dimension corresponding to time, and routing the message from the source node to the destination node using the dimension corresponding to time.
摘要翻译：公开了一种用于将消息从源节点路由到目的地节点的方法，其中源节点和目的地节点由基于周期的系统中的多个节点连接。该方法包括生成包括多个节点的迷宫数据结构，其中多个节点中的每一个与对应于时间的维度相关联，并且使用对应于时间的维度将消息从源节点路由到目的地节点。

6. 发明授权

US08555013B1 Method and system for memory protection by processor carrier based access control 有权
标题翻译：基于处理器载体的访问控制的存储器保护方法和系统
公开(公告)号：US08555013B1
公开(公告)日：2013-10-08
申请号：US11158774
申请日：2005-06-22
申请人： Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Olaf Manczak , Phyllis E. Gustafson , Yuguang Wu
发明人： Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Olaf Manczak , Phyllis E. Gustafson , Yuguang Wu
IPC分类号： G06F13/00 , G06F13/28
CPC分类号： G06F13/28
摘要： A method for memory protection in a multiprocessor system, involving receiving a request at a first carrier to perform a memory operation at a memory address, wherein the first carrier receives the request from a processor, determining by the first carrier whether the processor is permitted to access memory at the memory address using a carrier identification (ID) of a second carrier, wherein the second carrier is associated with a memory controller used to access the memory, and sending the request to the second carrier, if the processor is permitted to access the memory.
摘要翻译：一种用于多处理器系统中的存储器保护的方法，包括在第一载波处接收请求以在存储器地址执行存储器操作，其中所述第一载波从处理器接收所述请求，由所述第一载体确定所述处理器是否被允许使用第二载体的载波标识（ID）在存储器地址处访问存储器，其中所述第二载体与用于访问所述存储器的存储器控制器相关联，并且如果所述处理器被允许访问则将所述请求发送到所述第二载体记忆。

7. 发明授权

US07827381B2 Hybrid techniques for memory virtualization in a computer system 有权
标题翻译：计算机系统中内存虚拟化的混合技术
公开(公告)号：US07827381B2
公开(公告)日：2010-11-02
申请号：US11446644
申请日：2006-06-05
申请人： Olaf Manczak , Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Phyllis E. Gustafson
发明人： Olaf Manczak , Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Phyllis E. Gustafson
IPC分类号： G06F12/00 , G06F9/26 , G06F9/34
CPC分类号： G06F12/1045 , G06F12/109 , G06F2212/652
摘要： A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation. The selection of a first or second memory virtualization and corresponding address translation technique may be dependent on a predicted workload and/or on a user policy.
摘要翻译：计算机系统可以采用在处理器上执行的第一应用的第一存储器虚拟化和对应的虚拟到物理地址转换技术，以及用于在同一个处理器上执行的第二应用的第二存储器虚拟化和对应的虚拟到物理地址转换技术处理器对第一个应用程序是透明的。可以在每个线程的基础上采用不同的虚拟化和相应的翻译技术，而不是基于每个应用程序。可以采用不同的虚拟化和相应的翻译技术来访问不同范围的虚拟或对应的物理地址。不同的虚拟化和相应的翻译技术可以采用不同的页面大小。第一或第二虚拟化和相应的翻译技术可以包括基于页面的，基于片段的或基于功能的虚拟到物理地址转换。第一或第二存储器虚拟化和对应的地址转换技术的选择可以取决于预测的工作负载和/或用户策略。

8. 发明申请

US20080005498A1 Method and system for enabling a synchronization-free and parallel commit phase 有权
标题翻译：实现无同步和并行提交阶段的方法和系统
公开(公告)号：US20080005498A1
公开(公告)日：2008-01-03
申请号：US11450763
申请日：2006-06-09
申请人： Miguel Angel Lujan Moreno , Phyllis E. Gustafson , Michael H. Paleczny , Christopher A. Vick , Jay R. Freeman , Olaf Manczak
发明人： Miguel Angel Lujan Moreno , Phyllis E. Gustafson , Michael H. Paleczny , Christopher A. Vick , Jay R. Freeman , Olaf Manczak
IPC分类号： G06F13/00
CPC分类号： G06F9/528
摘要： A method for committing memory transactions in an application that includes executing a plurality of sections of the application in parallel, logging a plurality of memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, wherein the plurality of memory transactions that includes a plurality of writes to at least one memory location, comparing the plurality of logs to identify an optimal list of writes from the plurality of writes, and committing memory transactions corresponding to a subset of the plurality of temporary results, wherein the subset of the plurality of temporary results is identified by the optimal list of writes.
摘要翻译：一种在应用程序中提交内存事务的方法，包括并行执行应用程序的多个部分，记录在执行多个部分时发生的多个存储器事务，以获得多个日志和多个临时结果，其中所述多个存储器事务包括对至少一个存储器位置的多个写入，比较所述多个日志以识别来自所述多个写入的最佳写入列表，以及提交与所述多个临时结果的子集相对应的存储器事务，其中所述多个临时结果的子集由最佳写入列表识别。

9. 发明申请

US20070283124A1 Hybrid techniques for memory virtualization in a computer system 有权
标题翻译：计算机系统中内存虚拟化的混合技术
公开(公告)号：US20070283124A1
公开(公告)日：2007-12-06
申请号：US11446644
申请日：2006-06-05
申请人： Olaf Menczak , Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Phyllis E. Gustafson
发明人： Olaf Menczak , Christopher A. Vick , Michael H. Paleczny , Jay R. Freeman , Phyllis E. Gustafson
IPC分类号： G06F12/00
CPC分类号： G06F12/1045 , G06F12/109 , G06F2212/652
摘要： A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation. The selection of a first or second memory virtualization and corresponding address translation technique may be dependent on a predicted workload and/or on a user policy.
摘要翻译：计算机系统可以采用在处理器上执行的第一应用的第一存储器虚拟化和对应的虚拟到物理地址转换技术，以及用于在同一个处理器上执行的第二应用的第二存储器虚拟化和对应的虚拟到物理地址转换技术处理器对第一个应用程序是透明的。可以在每个线程的基础上采用不同的虚拟化和相应的翻译技术，而不是基于每个应用程序。可以采用不同的虚拟化和相应的翻译技术来访问不同范围的虚拟或对应的物理地址。不同的虚拟化和相应的翻译技术可以采用不同的页面大小第一或第二虚拟化和相应的翻译技术可以包括基于页面的，基于片段的或基于功能的虚拟到物理地址转换。第一或第二存储器虚拟化和对应的地址转换技术的选择可以取决于预测的工作负载和/或用户策略。

10. 发明申请

US20070283123A1 Function-based virtual-to-physical address translation 有权
标题翻译：基于功能的虚拟到物理地址转换
公开(公告)号：US20070283123A1
公开(公告)日：2007-12-06
申请号：US11446620
申请日：2006-06-05
申请人： Christopher A. Vick , Michael H. Paleczny , Olaf Manczak , Jay R. Freeman , Phyllis E. Gustafson
发明人： Christopher A. Vick , Michael H. Paleczny , Olaf Manczak , Jay R. Freeman , Phyllis E. Gustafson
IPC分类号： G06F12/00
CPC分类号： G06F12/1054 , G06F12/0284 , G06F12/10 , G06F12/109
摘要： A computer system employing memory virtualization may employ a function-based technique for virtual-to-physical address translation. A function-based translation technique may involve replacing a generic trap handler and one or more translation table look-ups with a function to compute a corresponding physical address from a given virtual address. The computer system may be configured to determine a translation function dependent on mappings in one or more translation tables. The computer system may be configured to reorganize a memory, to reorganize one or more translation tables, or to allocate different blocks of memory to an application prior to determining a translation function. Different applications or threads executing on the computer system may employ different translation functions. Different regions of memory may be accessed using different translation functions. Some virtual addresses may be translated using a function while others may be translated using one or more translation table look-ups.
摘要翻译：采用存储器虚拟化的计算机系统可以采用基于功能的虚拟到物理地址转换技术。基于函数的翻译技术可以包括用一个函数来替换一个通用陷阱处理程序和一个或多个翻译表查找，以从给定的虚拟地址计算对应的物理地址。计算机系统可以被配置为根据一个或多个翻译表中的映射来确定翻译函数。计算机系统可以被配置为在确定翻译功能之前重新组织存储器，重新组织一个或多个转换表，或者将不同的存储器块分配给应用。在计算机系统上执行的不同应用或线程可以采用不同的翻译功能。可以使用不同的翻译功能访问不同的存储器区域。可以使用功能翻译一些虚拟地址，而可以使用一个或多个翻译表查找来翻译其他虚拟地址。

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