专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08787594B1 Multi-stream audio level controller 有权
公开(公告)号：US08787594B1
公开(公告)日：2014-07-22
申请号：US11342513
申请日：2006-01-30
申请人： Stephen J. Fedigan , Daniel S. Jochalson , Jason D. Kridner , Jeffrey S. Hayes
发明人： Stephen J. Fedigan , Daniel S. Jochalson , Jason D. Kridner , Jeffrey S. Hayes
IPC分类号： H03G3/00 , H04B1/00
CPC分类号： H03G3/3089 , H03G3/3005
摘要： A volume level and crossfade controller with programmable fades and audio stream priority controls saturation for a multiple audio stream mixer. Start of fade and end of fade events trigger updates of relative volume level targets and volume ramps.

2. 发明授权

US07546636B1 Authorization control circuit and method 有权
标题翻译：授权控制电路及方法
公开(公告)号：US07546636B1
公开(公告)日：2009-06-09
申请号：US09712873
申请日：2000-11-15
申请人： Jason D. Kridner
发明人： Jason D. Kridner
IPC分类号： G06F21/00
CPC分类号： H03M1/002 , H03M1/66
摘要： An authorization control circuit (10) comprises a digital signal processor (12) operable to provide digital data output, determine an authorization state, and generate a disable signal. A digital to analog converter (28,60) is coupled to the digital signal processor (12) and is operable to receive the digital data output. The digital to analog converter (28,60) generates analog data in response to the digital data output and is operable to output the analog data and mute the output of analog data. The digital to analog converter (28,60) includes an input (23,25,27,59) operable to receive the disable signal. The digital to analog converter (28,60) mutes the output of analog data in response to the disable signal.
摘要翻译：授权控制电路（10）包括可操作以提供数字数据输出，确定授权状态并产生禁用信号的数字信号处理器（12）。数模转换器（28,60）耦合到数字信号处理器（12），并可操作以接收数字数据输出。数模转换器（28,60）响应于数字数据输出产生模拟数据，并且可操作地输出模拟数据并使模拟数据的输出静音。数模转换器（28,60）包括可操作以接收禁用信号的输入端（23,25,27,59）。数模转换器（28,60）响应禁用信号使模拟数据的输出静音。

3. 发明授权

US07159083B2 Programmable transition state machine 有权
标题翻译：可编程过渡状态机
公开(公告)号：US07159083B2
公开(公告)日：2007-01-02
申请号：US10319238
申请日：2002-12-13
申请人： Roshan J. Samuel , Jason D. Kridner
发明人： Roshan J. Samuel , Jason D. Kridner
IPC分类号： G06F12/00 , G06F13/00 , G06F7/38
CPC分类号： G05B19/056 , G05B2219/13009 , G05B2219/13108
摘要： The programmable transition state machine of this invention is designed to allow implementation of hardware capable of increasing the performance of critical encoding and decoding tasks in a microprocessor environment where a required encoding or decoding or machines is not known in advance. The state machine described may also be used in systems that need flexibility to support a wide variety of functions or machines or where a hardwired approach is not useful. This unique state machine processes the state information and the transition from a present state to a next state in CPU-programmable logic.
摘要翻译：本发明的可编程过渡状态机被设计为允许实现能够在预先不知道所需的编码或解码或机器的微处理器环境中增加关键编码和解码任务的性能的硬件。描述的状态机也可以用于需要灵活性来支持各种功能或机器的系统中，或者硬连线方法无用的系统中。这种独特的状态机在CPU可编程逻辑中处理状态信息和从当前状态到下一状态的转换。

4. 发明授权

US08589505B2 Method and apparatus for identifying and retrieving media content 有权
标题翻译：用于识别和检索媒体内容的方法和装置
公开(公告)号：US08589505B2
公开(公告)日：2013-11-19
申请号：US10306493
申请日：2002-11-27
申请人： Jason D. Kridner
发明人： Jason D. Kridner
IPC分类号： G06F15/16
CPC分类号： G06F17/30876
摘要： The specification discloses a system and related method for retrieving encoded media content, such as retrieving audio tracks from a CD in MP3 format. The system involves attaching indicia to the media, or possibly a case or protective cover of the media, which uniquely identifies the content. An encoding retrieval and playback device has the ability to obtain the unique number identified by the indicia, where obtaining the unique number may be a consumer entering the number, may be by reading a barcode label, may be by reading the number from a radio frequency device and the like. Once the unique number has been obtained, the encoding retrieval and playback device retrieves the encoded media content from a server across a network connection. In this manner, a consumer need only be present to initiate the retrieval process, and the retrieval of the encoded media content may be completed without the presence of the consumer, and without inserting the storage media in the playback device.
摘要翻译：本说明书公开了一种用于检索编码媒体内容的系统和相关方法，例如从MP3格式的CD中检索音轨。该系统包括将标记附着到介质上，或者可能将介质附着在唯一识别内容的介质的外壳或保护盖上。编码检索和重放装置具有获得由标记识别的唯一编号的能力，其中获得唯一编号可以是输入号码的消费者，可以通过读取条形码标签，可以通过从射频读取数字装置等。一旦获得了唯一的编号，编码检索和回放装置通过网络连接从服务器检索编码的媒体内容。以这种方式，消费者仅需要存在以启动检索过程，并且可以在不存在消费者的情况下完成编码的媒体内容的检索，并且不将存储介质插入回放设备中。

5. 发明授权

US06918018B2 64-bit single cycle fetch scheme for megastar architecture 有权
标题翻译：用于megastar架构的64位单周期提取方案
公开(公告)号：US06918018B2
公开(公告)日：2005-07-12
申请号：US10259309
申请日：2002-09-27
申请人： Roshan J. Samuel , Jason D. Kridner
发明人： Roshan J. Samuel , Jason D. Kridner
IPC分类号： G06F9/38 , G06F12/00
CPC分类号： G06F9/383 , G06F9/3816 , G06F9/3824
摘要： The 64-bit single cycle fetch method described here relates to a specific ‘megastar’ core processor employed in a range of new digital signal processor devices. The ‘megastar’ core incorporates 32-bit memory blocks arranged into separate entities or banks. Because the parent CPU has only three 16-bit buses, a maximum read in one clock cycle through the memory interface would normally be 48-bits. This invention describes an approach for a fetch method involving tapping into the memory bank data at an earlier stage prior to the memory interface. This allows the normal 48-bit fetch to be extended to 64-bits as required for full performance of the numerical processor accelerator and other speed critical operations and functions.
摘要翻译：这里描述的64位单周期提取方法涉及在一系列新的数字信号处理器设备中使用的特定的“巨型”核心处理器。 “巨型”核心将32位内存块整合到单独的实体或银行。因为父CPU只有三个16位总线，所以通过存储器接口的一个时钟周期的最大读取通常是48位。本发明描述了一种用于提取方法的方法，该方法包括在存储器接口之前的较早阶段敲击存储体数据。这允许将正常的48位提取扩展到64位，以满足数字处理器加速器和其他速度关键操作和功能的全面性能。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式