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    • 1. 发明申请
    • METHOD OF MANUFACTURING A PLURALITY OF ELECTRONIC ASSEMBLIES
    • 制造大量电子组件的方法
    • US20130032953A1
    • 2013-02-07
    • US13620477
    • 2012-09-14
    • John J. BeattyJason A. Garcia
    • John J. BeattyJason A. Garcia
    • H01L23/538
    • H01L25/50H01L21/563H01L23/3114H01L25/0657H01L2224/73204H01L2225/06513H01L2924/19041
    • A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.
    • 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个,从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄,而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。
    • 5. 发明授权
    • Traceability marks
    • 可追溯性标记
    • US08064728B2
    • 2011-11-22
    • US11694893
    • 2007-03-30
    • Jason A. Garcia
    • Jason A. Garcia
    • G06K9/00G06K9/46G06K9/36G06K9/62G06K9/66G06K7/10H04N9/47H04N7/18
    • G06K19/06037
    • The formation of marks on devices is described. In one embodiment, a method for marking a device includes forming a plurality of unique marks sequentially on a device. The method includes defining a virtual array having a plurality of cells extending in an x-direction and a plurality of cells extending in a y-direction, wherein the marks are each positioned in a cell in the virtual array. The method also includes capturing an image including the relative cell position of the marks within the virtual array and converting the relative position of the marks within the virtual array into a set of coordinates including an x value along the x-direction and a y value along the y-direction for each of the marks. The method also includes generating a device identification using a plurality of the x values and the y values. Other embodiments are described and claimed.
    • 描述了器件上的标记形成。 在一个实施例中,用于标记设备的方法包括在设备上顺序地形成多个唯一标记。 该方法包括定义具有在x方向上延伸的多个单元的虚拟阵列和沿y方向延伸的多个单元,其中,所述标记各自位于虚拟阵列中的单元中。 该方法还包括捕获包括虚拟阵列内的标记的相对单元位置的图像,并将虚拟阵列内的标记的相对位置转换成包括x方向上的x值和沿着x方向的ay值的一组坐标 y方向为每个标记。 该方法还包括使用多个x值和y值生成设备标识。 描述和要求保护其他实施例。
    • 6. 发明申请
    • TRACEABILITY MARKS
    • 可追溯性标志
    • US20080240614A1
    • 2008-10-02
    • US11694893
    • 2007-03-30
    • Jason A. Garcia
    • Jason A. Garcia
    • G06K9/36
    • G06K19/06037
    • The formation of marks on devices is described. In one embodiment, a method for marking a device includes forming a plurality of unique marks sequentially on a device. The method includes defining a virtual array having a plurality of cells extending in an x-direction and a plurality of cells extending in a y-direction, wherein the marks are each positioned in a cell in the virtual array. The method also includes capturing an image including the relative cell position of the marks within the virtual array and converting the relative position of the marks within the virtual array into a set of coordinates including an x value along the x-direction and a y value along the y-direction for each of the marks. The method also includes generating a device identification using a plurality of the x values and the y values. Other embodiments are described and claimed.
    • 描述了器件上的标记形成。 在一个实施例中,用于标记设备的方法包括在设备上顺序地形成多个唯一标记。 该方法包括定义具有在x方向上延伸的多个单元的虚拟阵列和沿y方向延伸的多个单元,其中,所述标记各自位于虚拟阵列中的单元中。 该方法还包括捕获包括虚拟阵列内的标记的相对单元位置的图像,并将虚拟阵列内的标记的相对位置转换成包括x方向上的x值和沿着x方向的ay值的一组坐标 y方向为每个标记。 该方法还包括使用多个x值和y值生成设备标识。 描述和要求保护其他实施例。
    • 9. 发明授权
    • Method of manufacturing a plurality of electronic assemblies
    • 制造多个电子组件的方法
    • US08709869B2
    • 2014-04-29
    • US13620477
    • 2012-09-14
    • John J. BeattyJason A. Garcia
    • John J. BeattyJason A. Garcia
    • H01L21/00
    • H01L25/50H01L21/563H01L23/3114H01L25/0657H01L2224/73204H01L2225/06513H01L2924/19041
    • A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.
    • 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个,从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄,而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。