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    • 1. 发明授权
    • Apparatus and method for electronically encoding an article with work-in-progress information
    • 用于用作品进行信息对文章进行电子编码的装置和方法
    • US06795743B1
    • 2004-09-21
    • US09663997
    • 2000-09-18
    • James S. BellMichael L. Berry
    • James S. BellMichael L. Berry
    • G06F1900
    • G05B19/4183G05B2219/31304G06Q10/06Y02P90/10Y02P90/14
    • A method for electronically encoding an article with work-in-progress information includes determining a work-in-progress condition of the article and setting an encoding device attached to the article to a set-point corresponding to the work-in-progress condition. Determining the work-in-progress condition includes identifying a present work-in-progress condition of the article and at least one historical work-in-progress condition of the article. Adjusting the encoding device includes adjusting the encoding device from a first set-point of a first set-point set to a first set-point of a second set-point set in response to passing a first work-in-progress evaluation, and adjusting the encoding device from the first set-point of the second set-point set to a second set-point of the first set-point set in response to failing a second work-in-progress evaluation after passing the first work-in-progress evaluation. The present work-in-progress information and historical work-in-progress information of the article are used to effectively estimate the reliability and improve the manufacturability of the article.
    • 一种用于用作品进行信息对文章进行电子编码的方法包括确定文章的在制品状态并将附着于该商品的编码装置设置为与在制品条件相对应的设定点。 确定正在进行的工作条件包括确定文章目前的在制品条件和文章的至少一个历史工作进展条件。 调整编码装置包括响应于通过第一在制品评估而将编码装置从第一设定点集合的第一设定点调整到第二设定点集合的第一设定点,并且调整 所述编码装置从所述第二设定点的所述第一设定点到所述第一设定点的第二设定点,以响应于在通过所述第一工作进行中之后进行的第二工作进行中的评估 评估。 本文的现有工作信息和历史工作信息用于有效估计文章的可靠性和可制造性。
    • 2. 发明授权
    • Method and apparatus for testing electronic systems using
electromagnetic emissions profiles
    • 使用电磁辐射曲线测试电子系统的方法和装置
    • US6160517A
    • 2000-12-12
    • US009398
    • 1998-01-20
    • James S. BellDavid Staggs
    • James S. BellDavid Staggs
    • G01R29/08G01R31/00G01R31/28
    • G01R31/002G01R29/0892
    • A printed circuit board assembly testing device includes a LISN device connected to a power source and to a test enclosure. The test enclosure includes a power supply and a communication port. A signal analyzer is interfaced to the LISN device. A circuit board assembly unit under test is positioned in the test enclosure. A controlling computer is interfaced to the communication port. The controlling computer includes a hard disk storage device having benchmark data stored therein. A communication bus interconnects the controlling computer to the signal analyzer. The unit under test is powered up and emissions data is observed which correlates to activity in the unit under test. The emissions data is compared to the benchmark data and a determination can be made as to whether the observed data meets the benchmark data within an acceptable tolerance.
    • 印刷电路板组装测试装置包括连接到电源和测试外壳的LISN设备。 测试机箱包括电源和通信端口。 信号分析仪连接到LISN设备。 被测电路板组件单元位于测试外壳中。 控制计算机连接到通信端口。 控制计算机包括具有存储在其中的基准数据的硬盘存储装置。 通信总线将控制计算机与信号分析仪互连。 被测单元通电,并观察与被测单位的活动相关的排放数据。 将排放数据与基准数据进行比较,并且可以确定观察到的数据是否在可接受的容限内满足基准数据。
    • 3. 发明授权
    • System level functional testing through one or more I/O ports of an
assembled computer system
    • 通过组装的计算机系统的一个或多个I / O端口进行系统级功能测试
    • US5875293A
    • 1999-02-23
    • US512617
    • 1995-08-08
    • James S. BellFranklin D. TomlinsonMichael A. Wason
    • James S. BellFranklin D. TomlinsonMichael A. Wason
    • G06F11/22G06F11/26G06F11/267G06F11/273G06F11/00
    • G06F11/261G06F11/22G06F11/267G06F11/273
    • A test apparatus and method for fully testing the functional aspects of a computer system at the system level through one or more of its I/O ports. A test system is connected to an externally available I/O port of the computer under test for accessing its system ROM and a jumper is installed on the computer under test to disable its system ROM. The jumper also bypasses the PCMCIA controller, if necessary, to provide the test system direct access to the I/O port and thus the system ROM. The computer under test is booted from diagnostic test code stored in memory of the test system, where the diagnostic test code has complete control and performs a series of tests on the computer under test. Other I/O ports of the computer under test, including its serial ports, parallel port, keyboard and mouse ports, video port and a docking port may also be connected to the test system, if desired. Certain portions of the diagnostic test code may be downloaded into video RAM of the computer under test and executed sequentially. Also, a communication protocol may be established between the host computer and the computer under test so that the host computer can control initiation and monitor status of each test routine.
    • 一种用于通过其一个或多个I / O端口在系统级全面测试计算机系统的功能方面的测试装置和方法。 测试系统连接到被测计算机的外部可用I / O端口,用于访问其系统ROM,并且在被测计算机上安装跳线以禁用其系统ROM。 如果需要,跳线也绕过PCMCIA控制器,以提供测试系统直接访问I / O端口,从而提供系统ROM。 受检计算机从存储在测试系统内存中的诊断测试代码引导,其中诊断测试代码已完全控制,并对被测计算机进行一系列测试。 如果需要,被测计算机的其他I / O端口,包括其串行端口,并行端口,键盘和鼠标端口,视频端口和对接端口也可以连接到测试系统。 诊断测试代码的某些部分可以被下载到被测计算机的视频RAM中,并且依次执行。 此外,可以在主计算机和被测计算机之间建立通信协议,使得主计算机可以控制每个测试例程的启动和监视状态。
    • 4. 发明授权
    • Method for securing an electronic component to a pin grid array socket
    • 将电子部件固定到针格栅阵列插座的方法
    • US5850691A
    • 1998-12-22
    • US740833
    • 1996-11-04
    • James S. Bell
    • James S. Bell
    • H05K3/30H05K7/10H05K3/32H05K7/12H05K13/04
    • H05K7/1069H05K3/301H05K7/1084H05K3/306Y10S269/903Y10T29/49139Y10T29/49144Y10T29/49153Y10T29/53265
    • The present invention is directed to a device for securing an electrical component to a pin grid array (PGA) socket that has a substantially planar body portion and a plurality of conductor pins, which are electrically connectable to a circuit board and project outwardly in a direction substantially perpendicular to the planar body portion. The device comprises a base member that has a plurality of conductor pin apertures which extend through the base member. Each of the conductor pin apertures are registered to receive therethrough a corresponding one of the plurality of conductor pins, to thereby sandwich the base member between and anchor the base member to the circuit board and the PGA socket when the PGA socket is electrically connected to the circuit board. The device further comprises a retainer for releasably securing the electrical component to the PGA socket. The retainer is coupled to the base member and a surface of the electrical component and transmits a retaining force from the base member to the electrical component, thereby substantially preventing the electrical component from separating from the PGA socket.
    • 本发明涉及一种用于将电气部件固定到具有基本上平坦的主体部分和多个导体销的针状格栅阵列(PGA)插座的装置,其可电连接到电路板并沿着方向向外突出 基本上垂直于平面主体部分。 该装置包括具有延伸穿过基底构件的多个导体销孔的基座构件。 每个导体销孔被配准为通过其中的相应的一个导体销来接纳,从而当基座部件电连接到电路板和PGA插座时,将基座夹在基板之间并将其固定到PGA插座 电路板。 该装置还包括用于将电气部件可释放地固定到PGA插座的保持器。 保持器联接到基部构件和电气部件的表面,并且将保持力从基部构件传递到电气部件,从而基本上防止电气部件与PGA插座分离。
    • 5. 发明授权
    • System and method for error location in printed wire assemblies by
external power on self test (post) commands
    • 通过外部电源自检(后)命令对打印线组件中错误位置的系统和方法
    • US5535330A
    • 1996-07-09
    • US279759
    • 1994-07-22
    • James S. Bell
    • James S. Bell
    • G01R31/28G06F11/22G06F11/24G06F11/34
    • G01R31/2803G06F11/22G06F11/2273G06F11/24
    • A system for detecting and locating errors in printed wire assemblies contained in a device with capabilities of performing a power on self test (POST) comprised of testing subroutines. The system monitors the device during execution of the POST. If a run error occurs during the POST, the system, through its monitoring, receives an indication of the run error. The system then delivers to the device a command, external to the POST routine, which directs the POST routine to thereafter separately execute each of the testing subroutines of the POST. If a run error occurs in any testing subroutine as it is being separately executed, a signal indicative of the run error and particular testing subroutine in which it occurred is sent to the system. The system, in this manner, may track a particular printed wire assembly and, with information about where within the printed wire assembly execution steps of the particular testing subroutine occur, determine the source within the printed wire assembly of the failure which caused the run error.
    • 一种用于检测和定位包含在具有执行由测试子程序组成的电源自检(POST)的能力的设备中的印刷线组件中的错误的系统。 系统在执行POST期间监视设备。 如果在POST期间发生运行错误,则系统通过其监视接收运行错误的指示。 然后,系统将该例程的外部命令传递给设备,该命令指示POST例程,然后单独执行POST的每个测试子例程。 如果在任何测试子程序中分别执行运行错误,则表示运行错误的信号及其发生的特定测试子程序被发送到系统。 以这种方式,该系统可以跟踪特定的印刷线组件,并且关于在特定测试子程序的印刷线组件执行步骤中的位置的信息,确定导致运行误差的故障的印刷线组件内的源 。