专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4138615A Presettable integrating timing circuit 失效
标题翻译：可预置积分定时电路
公开(公告)号：US4138615A
公开(公告)日：1979-02-06
申请号：US830721
申请日：1977-09-06
申请人： James R. McKinlay
发明人： James R. McKinlay
IPC分类号： G06G7/186 , H03K17/28 , H03K5/153 , H03K13/02
CPC分类号： G06G7/186 , H03K17/28
摘要： A presettable integrating timing circuit is capable of comparing the timelt product of an input signal with a preset signal. Means, comprising an input and an output, integrate an electrical signal at the input into an integrated signal at the output. Means, having two inputs, one input being connected to the output of the integrating means, the other input being connectable to a reference voltage, are capable of comparing the magnitude of a signal appearing at the first-named input with the reference voltage. Means are connected to the integrating means for clamping the input of the integrating means at a desired value. A feedback circuit is connected between the output and the input of the integrating means, to prevent the integrating means from saturating.
摘要翻译：可预置的积分定时电路能够将输入信号的时间积乘以预置信号进行比较。包括输入和输出的装置将输入处的电信号整合为输出处的积分信号。意味着，具有两个输入，一个输入连接到积分装置的输出，另一个可连接到参考电压的输入端能够将出现在第一命名输入端的信号的幅度与参考电压进行比较。装置连接到积分装置，用于将积分装置的输入钳位在期望值。反馈电路连接在积分装置的输出和输入之间，以防止积分装置饱和。

IPRDB

热门服务

关于我们

友情链接

联系方式