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1. 发明授权

US07346786B1 System for providing different polarities of power supplied over ethernet cables 有权
标题翻译：通过以太网电缆提供不同功率供电的系统
公开(公告)号：US07346786B1
公开(公告)日：2008-03-18
申请号：US10953431
申请日：2004-09-29
申请人： Brent Dimick , James B Klingensmith , Elton Armstrong
发明人： Brent Dimick , James B Klingensmith , Elton Armstrong
IPC分类号： G06F1/00
CPC分类号： G06F1/266 , H04L12/66
摘要： A system and method adjusts the polarity of power provided over Ethernet cabling according to configuration information received.
摘要翻译：系统和方法根据接收的配置信息调整以太网电缆提供的电源极性。

2. 发明授权

US07221261B1 System and method for indicating a configuration of power provided over an ethernet port 有权
标题翻译：指示通过以太网端口提供的电源配置的系统和方法
公开(公告)号：US07221261B1
公开(公告)日：2007-05-22
申请号：US10953407
申请日：2004-09-29
申请人： James B Klingensmith , Brent Dimick , Elton Armstrong
发明人： James B Klingensmith , Brent Dimick , Elton Armstrong
IPC分类号： G05B11/01
CPC分类号： H04L12/10
摘要： A system and method indicates the configuration of power to be provided over Ethernet cabling.
摘要翻译：系统和方法指示通过以太网布线配置电源。

3. 发明授权

US4398244A Interruptible microprogram sequencing unit and microprogrammed apparatus utilizing same 失效
标题翻译：中断微程序排序单元和利用其的微程序设备
公开(公告)号：US4398244A
公开(公告)日：1983-08-09
申请号：US147100
申请日：1980-05-07
申请人： Paul Chu , James B. Klingensmith
发明人： Paul Chu , James B. Klingensmith
IPC分类号： G06F9/22 , G06F9/26
CPC分类号： G06F9/268
摘要： An interruptible microprogram sequencing unit (MSU) for providing a sequence of microinstruction addresses to a control memory containing microinstructions for the operation of a microprogrammed apparatus. The MSU includes an address output for providing microinstruction addresses to the control memory, an address bus connected to the address output such that a plurality of microinstruction addresses applied to the address bus are sequentially provided to the address output, means connected to the address bus for applying the plurality of microinstruction addresses to the address bus, an interrupt return register operably connected to the address bus for receiving a microinstruction address from the address bus and storing the received microinstruction address, and means connected to the address bus for interrupting the sequence of microinstruction addresses and effecting storage of a microinstruction address on the address bus in the interrupt return register.
摘要翻译：一种可中断微程序排序单元（MSU），用于向包含用于微程序设备的操作的微指令的控制存储器提供一系列微指令地址。 MSU包括用于向控制存储器提供微指令地址的地址输出，连接到地址输出的地址总线，使得施加到地址总线的多个微指令地址被顺序地提供给地址输出，连接到地址总线的装置将多个微指令地址应用到地址总线，中断返回寄存器可操作地连接到地址总线，用于从地址总线接收微指令地址并存储接收到的微指令地址，以及连接到地址总线的装置，用于中断微指令序列在中断返回寄存器的地址总线上寻址并实现微指令地址的存储。

4. 发明授权

US5077656A CPU channel to control unit extender 失效
标题翻译： CPU通道控制单元扩展器
公开(公告)号：US5077656A
公开(公告)日：1991-12-31
申请号：US559516
申请日：1990-07-23
申请人： Billy B. Waldron , James B. Klingensmith , Ernest H. Wilson, Jr. , Matthew Harris , Paul Yursis
发明人： Billy B. Waldron , James B. Klingensmith , Ernest H. Wilson, Jr. , Matthew Harris , Paul Yursis
IPC分类号： G06F11/00 , G06F11/10 , G06F11/14 , G06F13/12
CPC分类号： G06F13/122 , G06F11/1443 , G06F11/076 , G06F11/10
摘要： A system is described with which data can be reliably transferred at high channel speeds between an IBM CPU channel and a remotely located control unit through a high speed full duplex data link that can be a T3 speed telephone line. A pair of similar coupler units are provided, one of which is connected by way of conventional bus and tag cables to a channel and the other by such cables to the remotely located control unit. In one embodiment, the coupler units have extended buffers to enable retransmissions of entire data blocks in case of error. A special counter technique is described whereby the transfer of fixed length data blocks for I/O devices such as printers can be accommodated without creating incorrect length problems with the channel. A high speed microprocessor is used to regulate the initialization and end sequences needed to establish communication between the channel and a control unit while a data transfer assist logic controls the transfer of data which is transmitted over the serial data link without interlock signals normally used between a channel and a control unit. A data streaming mode is accommodated.
摘要翻译：描述了通过可以是T3速度电话线的高速全双工数据链路，可以在IBM CPU通道和位于远程的控制单元之间以高通道速度可靠地传送数据的系统。提供了一对类似的耦合器单元，其中之一通过传统的总线和标签电缆连接到通道，另一个通过这种电缆连接到位于远程的控制单元。在一个实施例中，耦合器单元具有扩展缓冲器，以便在发生错误的情况下重新发送整个数据块。描述了一种特殊的计数器技术，由此可以适应诸如打印机之类的I / O设备的固定长度数据块的传送，而不会造成信道长度不正确的问题。高速微处理器用于调节在通道和控制单元之间建立通信所需的初始化和结束顺序，而数据传输辅助逻辑控制通过串行数据链路发送的数据的传输，而无需在通道和控制单元。数据流模式被容纳。

5. 发明授权

US07761722B1 Method for providing different polarities of power supplied over ethernet cables 失效
标题翻译：提供以太网电缆供电不同极性的方法
公开(公告)号：US07761722B1
公开(公告)日：2010-07-20
申请号：US11975443
申请日：2007-10-18
申请人： Brent Dimick , James B Klingensmith , Elton Armstrong
发明人： Brent Dimick , James B Klingensmith , Elton Armstrong
IPC分类号： G06F1/00
CPC分类号： G06F1/266 , H04L12/66
摘要： A system and method adjusts the polarity of power provided over Ethernet cabling according to configuration information received.
摘要翻译：系统和方法根据接收的配置信息调整以太网电缆提供的电源极性。

6. 发明授权

US07187268B1 System and method for safely controlling, and receiving status of, power over ethernet 有权
标题翻译：用于安全控制和接收以太网供电状态的系统和方法
公开(公告)号：US07187268B1
公开(公告)日：2007-03-06
申请号：US10953408
申请日：2004-09-29
申请人： Elton Armstrong , Brent Dimick , James B Klingensmith
发明人： Elton Armstrong , Brent Dimick , James B Klingensmith
IPC分类号： G05B11/01
CPC分类号： H04L12/10 , G05B2219/25132 , G05B2219/25174
摘要： A system and method electrically isolates configuration and status information about power provided over Ethernet cabling.
摘要翻译：系统和方法电气隔离以太网布线提供的电源的配置和状态信息。

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