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1. 发明授权

US08571352B2 Difference image generation device, difference image generation method, and computer readable media 有权
标题翻译：差分图像生成装置，差分图像生成方法以及计算机可读介质
公开(公告)号：US08571352B2
公开(公告)日：2013-10-29
申请号：US12760764
申请日：2010-04-15
申请人： Isao Sezaki
发明人： Isao Sezaki
IPC分类号： G06K9/32 , G06K9/36
CPC分类号： H04N17/004
摘要： One exemplary embodiment includes a difference image generation device including a measurement unit and a scaling unit. The measurement unit measures a variation width of pixel values of a difference image signal obtained by performing subtraction processing on first and second input image signals. The scaling unit scales each pixel value of the difference image signal based on a measurement result of the variation width so that the difference image signal can be represented in grayscale using a predetermined bit width, and outputs a difference image signal subjected to scaling.
摘要翻译：一个示例性实施例包括包括测量单元和缩放单元的差分图像生成装置。测量单元测量通过对第一和第二输入图像信号执行减法处理而获得的差分图像信号的像素值的变化宽度。缩放单元基于变化宽度的测量结果对差分图像信号的每个像素值进行缩放，使得差分图像信号可以使用预定位宽度以灰度表示，并输出经过缩放的差分图像信号。

2. 发明授权

US06816202B1 Picture frame generating circuit and digital television system using the same 失效
标题翻译：相框生成电路和数字电视系统使用相同
公开(公告)号：US06816202B1
公开(公告)日：2004-11-09
申请号：US09671151
申请日：2000-09-28
申请人： Isao Sezaki
发明人： Isao Sezaki
IPC分类号： H04N504
CPC分类号： H04N5/44504 , H04N5/45 , H04N21/4316
摘要： A picture frame generating circuit has: a coordinate value calculation processor that calculates frame start position (X, Y), picture end position (X, Y), frame end position (X, Y) using calculation start signal as activation signal, based on picture position (X, Y) registers, picture size (X, Y) registers and frame size register which are written through a data bus, the processor allowing frame color data to be written into frame color register to designate the color of frame through the data bus: and a selection circuit of frame and picture to which the frame start position (X, Y), picture end position (X, Y), frame end position (X, Y), picture position (X, Y) registers, frame color data, picture data, horizontal display position and vertical display position are input, the circuit selecting the picture data or frame color data and outputs the selected one as display data.

3. 发明申请

US20110299598A1 MOTION VECTOR DISPLAY CIRCUIT AND MOTION VECTOR DISPLAY METHOD 审中-公开
标题翻译：运动矢量显示电路和运动矢量显示方法
公开(公告)号：US20110299598A1
公开(公告)日：2011-12-08
申请号：US13151890
申请日：2011-06-02
申请人： Isao SEZAKI
发明人： Isao SEZAKI
IPC分类号： H04N7/26
CPC分类号： H04N5/144 , G09G3/20 , G09G5/02 , G09G2320/0247 , G09G2320/106 , H04N7/014
摘要： A motion vector display circuit includes a motion vector detection circuit that detects a motion vector between frame images, and a norm calculation circuit that calculates the length of a motion vector detected by the motion vector detection circuit. The length of the detected motion vector is converted into a luminance component of a display signal, a first component of the motion vector is converted into a first chrominance component of the display signal, a second component of the motion vector is converted into a second chrominance component of the display signal, and the motion vector is displayed using the display signal.
摘要翻译：运动矢量显示电路包括检测帧图像之间的运动矢量的运动矢量检测电路和计算由运动矢量检测电路检测的运动矢量的长度的范数运算电路。检测到的运动矢量的长度被转换成显示信号的亮度分量，运动矢量的第一分量被转换成显示信号的第一色度分量，运动矢量的第二分量被转换成第二色度显示信号的分量，并且使用显示信号显示运动矢量。

4. 发明申请

US20110033120A1 IMAGE PROCESSING DEVICE AND IMAGE PROCESSING METHOD 审中-公开
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US20110033120A1
公开(公告)日：2011-02-10
申请号：US12817888
申请日：2010-06-17
申请人： Isao SEZAKI
发明人： Isao SEZAKI
IPC分类号： G06K9/54
CPC分类号： G09G5/08 , G09G3/006 , G09G5/02
摘要： An image processing device includes a pixel value read out unit which reads out a pixel value of a target pixel, a pixel value change unit which changes a pixel value of a noticeable pixel, the noticeable pixel being at least one pixel of adjacent pixels adjacent to the target pixel, and a coordinate specify unit which specifies a position of the target pixel in an image, the target pixel having the noticeable pixel as the adjacent pixel. The pixel value of the noticeable pixel is changed.
摘要翻译：图像处理装置包括读出目标像素的像素值的像素值读出单元，改变显着像素的像素值的像素值变更单元，与该相邻像素相邻的相邻像素的至少一个像素的显着像素目标像素和指定图像中的目标像素的位置的坐标指定单元，具有可注意像素的目标像素作为相邻像素。显着像素的像素值发生变化。

5. 发明申请

US20100266221A1 DIFFERENCE IMAGE GENERATION DEVICE, DIFFERENCE IMAGE GENERATION METHOD, AND COMPUTER READABLE MEDIA 有权
标题翻译：差分图像生成装置，差分图像生成方法和计算机可读介质
公开(公告)号：US20100266221A1
公开(公告)日：2010-10-21
申请号：US12760764
申请日：2010-04-15
申请人： Isao Sezaki
发明人： Isao Sezaki
IPC分类号： G06K9/32
CPC分类号： H04N17/004
摘要： One exemplary embodiment includes a difference image generation device including a measurement unit and a scaling unit. The measurement unit measures a variation width of pixel values of a difference image signal obtained by performing subtraction processing on first and second input image signals. The scaling unit scales each pixel value of the difference image signal based on a measurement result of the variation width so that the difference image signal can be represented in grayscale using a predetermined bit width, and outputs a difference image signal subjected to scaling.
摘要翻译：一个示例性实施例包括包括测量单元和缩放单元的差分图像生成装置。测量单元测量通过对第一和第二输入图像信号执行减法处理而获得的差分图像信号的像素值的变化宽度。缩放单元基于变化宽度的测量结果对差分图像信号的每个像素值进行缩放，使得差分图像信号可以使用预定位宽度以灰度表示，并输出经过缩放的差分图像信号。

6. 发明授权

US6144239A Semiconductor integrated circuit with phase adjusting function and system using the same 失效
标题翻译：具有相位调整功能的半导体集成电路及使用相同的系统
公开(公告)号：US6144239A
公开(公告)日：2000-11-07
申请号：US102517
申请日：1998-06-22
申请人： Shigeki Yonemori , Isao Sezaki
发明人： Shigeki Yonemori , Isao Sezaki
IPC分类号： G06F1/10 , G11C7/22 , H03L7/081 , H03L7/06
CPC分类号： G11C7/1093 , G06F1/10 , G11C7/22 , G11C7/222 , H03L7/081
摘要： A semiconductor integrated circuit includes a register for storing a designated value and a delay element group for delaying an input signal by a delay quantity set based on the designated value to output the signal delayed by the delay quantity as a delay signal. The semiconductor integrated circuit further includes a PLL circuit for inputting the delay signal and a clock signal and for outputting a phase adjustment signal. In this case, the phase adjustment signal is supplied to the delay element group as the input signal.
摘要翻译：半导体集成电路包括用于存储指定值的寄存器和用于使输入信号延迟基于指定值设置的延迟量的延迟元件组，以输出延迟延迟量的信号作为延迟信号。半导体集成电路还包括用于输入延迟信号和时钟信号并用于输出相位调整信号的PLL电路。在这种情况下，相位调整信号作为输入信号被提供给延迟元件组。

7. 发明授权

US06324615B1 Data processor 失效
标题翻译：数据处理器
公开(公告)号：US06324615B1
公开(公告)日：2001-11-27
申请号：US09229035
申请日：1999-01-12
申请人： Isao Sezaki
发明人： Isao Sezaki
IPC分类号： G06F1338
CPC分类号： G06F13/368
摘要： To provide a data processor having a bus means whereby high-speed data exchange can be performed stably among a plurality of inner circuits (1 to 5) without dissipation of useless current, the bus means comprises more than one bus selectors (7 and 8) cascade-connected into a loop by way of bus lines. Each (7) of the bus selectors outputs bus data supplied from a preceding bus selector (8) as bus data to be supplied towards a following bus selector (8) when none of the inner circuits (1 to 3) connected to the bus selector (7) enables an output enable signal, and outputs output data of one of the inner circuits (1 to 3) connected to the bus selector (7) as the bus data to be supplied towards the following bus selector (8) when the inner circuit enables the output enable signal.
摘要翻译：为了提供具有总线装置的数据处理器，从而可以在多个内部电路（1至5）之间稳定地执行高速数据交换，而不耗散无用电流，总线装置包括多于一个总线选择器（7和8）通过总线串联连接到一个回路中。每个（7）总线选择器输出从前一总线选择器（8）提供的总线数据作为总线数据，以便当不连接到总线选择器（8）的内部电路（1至3）（7）使得能够输出使能信号，并且当连接到总线选择器（7）的内部电路（1至3）中的一个的输出数据作为要向后续总线选择器（8）提供的总线数据时，内部电路使能输出使能信号。

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