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1. 发明授权

US08970285B2 Dual supply level shifter circuits 有权
标题翻译：双电源电平转换电路
公开(公告)号：US08970285B2
公开(公告)日：2015-03-03
申请号：US13831828
申请日：2013-03-15
申请人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
发明人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
IPC分类号： H03L5/00
CPC分类号： H03K19/018528 , H03K19/018521
摘要： A dual supply level shifter circuit includes a switching circuit and a set of level shifter circuits coupled to the switching circuit. The switching circuit includes a first set of coupled transistors, wherein the supply switching circuit is coupled to a first supply source that is configured to provide a first power supply voltage and is coupled to a second supply source that is configured to provide a second power supply voltage. The set of level shifter circuits includes a second set of coupled transistors, wherein the set of level shifter circuits is configured to receive a voltage input signal at an input node from a first circuit and to supply to an output node of the dual supply level shifter circuit an output signal having a value that is a highest voltage value between the first power supply voltage and the second power supply voltage.
摘要翻译：双电源电平移位器电路包括开关电路和耦合到开关电路的一组电平移位器电路。开关电路包括第一组耦合的晶体管，其中电源开关电路耦合到第一电源，该第一电源被配置为提供第一电源电压并被耦合到第二电源，该第二电源被配置为提供第二电源电压。该组电平移位器电路包括第二组耦合晶体管，其中该组电平移位器电路被配置为从第一电路接收输入节点处的电压输入信号并提供给双电源电平移位器的输出节点对具有第一电源电压和第二电源电压之间的最高电压值的值的输出信号进行电路化。

2. 发明申请

US20140266385A1 DUAL SUPPLY LEVEL SHIFTER CIRCUITS 有权
标题翻译：双电源电平更换电路
公开(公告)号：US20140266385A1
公开(公告)日：2014-09-18
申请号：US13831828
申请日：2013-03-15
申请人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
发明人： John M. Pigott , Ira G. Miller , Paul E. Fletcher
IPC分类号： H03L5/00
CPC分类号： H03K19/018528 , H03K19/018521
摘要： A dual supply level shifter circuit includes a switching circuit and a set of level shifter circuits coupled to the switching circuit. The switching circuit includes a first set of coupled transistors, wherein the supply switching circuit is coupled to a first supply source that is configured to provide a first power supply voltage and is coupled to a second supply source that is configured to provide a second power supply voltage. The set of level shifter circuits includes a second set of coupled transistors, wherein the set of level shifter circuits is configured to receive a voltage input signal at an input node from a first circuit and to supply to an output node of the dual supply level shifter circuit an output signal having a value that is a highest voltage value between the first power supply voltage and the second power supply voltage.
摘要翻译：双电源电平移位器电路包括开关电路和耦合到开关电路的一组电平移位器电路。开关电路包括第一组耦合的晶体管，其中电源开关电路耦合到第一电源，该第一电源被配置为提供第一电源电压并被耦合到第二电源，该第二电源被配置为提供第二电源电压。该组电平移位器电路包括第二组耦合晶体管，其中该组电平移位器电路被配置为从第一电路接收输入节点处的电压输入信号并提供给双电源电平移位器的输出节点对具有第一电源电压和第二电源电压之间的最高电压值的值的输出信号进行电路化。

3. 发明申请

US20100271078A1 CIRCUITRY IN A DRIVER CIRCUIT 有权
标题翻译：驱动电路中的电路
公开(公告)号：US20100271078A1
公开(公告)日：2010-10-28
申请号：US12429491
申请日：2009-04-24
申请人： Ira G. Miller , John M. Pigott
发明人： Ira G. Miller , John M. Pigott
IPC分类号： H03K3/00 , H03L5/00
CPC分类号： H03K3/356113 , H02M1/08 , H02M3/1588 , H03K3/0375 , H03K17/6874 , H03K2217/0081 , Y02B70/1466
摘要： A driver circuit includes a first and a second voltage rail, a first pre-driver circuit, a power transistor, comparison circuitry which indicates when a voltage level of the first voltage rails is above or below a reference voltage level, a level shift circuit coupled between the first voltage rail and the second voltage rail which provides a level shifted output, a tapered buffer circuit coupled to the first voltage rail and to a first circuit node, wherein the tapered buffer circuit receives the level shifted output and provides a buffered output to a control electrode of the first pre-driver transistor, and a rail voltage adjusting circuit coupled between the first circuit node and the second voltage rail, which, in response to the comparison circuitry indicating that the voltage level of the first voltage rail is above the reference voltage level, adjusts a voltage level of the second voltage rail.
摘要翻译：驱动器电路包括第一和第二电压轨，第一预驱动器电路，功率晶体管，比较电路，其指示第一电压轨的电压电平何时高于或低于参考电压电平;电平移位电路耦合在提供电平移位输出的第一电压轨和第二电压轨之间，耦合到第一电压轨和第一电路节点的渐缩缓冲电路，其中锥形缓冲电路接收电平移位输出并提供缓冲输出所述第一预驱动晶体管的控制电极以及耦合在所述第一电路节点和所述第二电压轨之间的轨电压调整电路，所述轨电压调整电路响应于所述比较电路，指示所述第一电压轨的电压高于参考电压电平，调整第二电压轨的电压电平。

4. 发明授权

US07808286B1 Circuitry in a driver circuit 有权
标题翻译：电路中的驱动电路
公开(公告)号：US07808286B1
公开(公告)日：2010-10-05
申请号：US12429491
申请日：2009-04-24
申请人： Ira G. Miller , John M. Pigott
发明人： Ira G. Miller , John M. Pigott
IPC分类号： H03K3/00
CPC分类号： H03K3/356113 , H02M1/08 , H02M3/1588 , H03K3/0375 , H03K17/6874 , H03K2217/0081 , Y02B70/1466
摘要： A driver circuit includes a first and a second voltage rail, a first pre-driver circuit, a power transistor, comparison circuitry which indicates when a voltage level of the first voltage rails is above or below a reference voltage level, a level shift circuit coupled between the first voltage rail and the second voltage rail which provides a level shifted output, a tapered buffer circuit coupled to the first voltage rail and to a first circuit node, wherein the tapered buffer circuit receives the level shifted output and provides a buffered output to a control electrode of the first pre-driver transistor, and a rail voltage adjusting circuit coupled between the first circuit node and the second voltage rail, which, in response to the comparison circuitry indicating that the voltage level of the first voltage rail is above the reference voltage level, adjusts a voltage level of the second voltage rail.
摘要翻译：驱动器电路包括第一和第二电压轨，第一预驱动器电路，功率晶体管，比较电路，其指示第一电压轨的电压电平何时高于或低于参考电压电平;电平移位电路耦合在提供电平移位输出的第一电压轨和第二电压轨之间，耦合到第一电压轨和第一电路节点的渐缩缓冲电路，其中锥形缓冲电路接收电平移位输出并提供缓冲输出所述第一预驱动晶体管的控制电极以及耦合在所述第一电路节点和所述第二电压轨之间的轨电压调整电路，所述轨电压调整电路响应于所述比较电路，指示所述第一电压轨的电压高于参考电压电平，调整第二电压轨的电压电平。

5. 发明授权

US07759923B2 Current sensing in a buck-boost switching regulator using integrally embedded PMOS devices 有权
标题翻译：使用整体嵌入式PMOS器件的降压 - 升压开关稳压器中的电流检测
公开(公告)号：US07759923B2
公开(公告)日：2010-07-20
申请号：US12169485
申请日：2008-07-08
申请人： Ira G. Miller , Eduardo Velarde
发明人： Ira G. Miller , Eduardo Velarde
IPC分类号： G05F1/40 , G05F1/56
CPC分类号： H01L27/088 , H01L27/0207 , H01L29/41758 , H01L29/78
摘要： A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of the power transistor being used as sense transistor cells. The sense transistor cells are evenly distributed throughout the cellular array where the source terminal of each sense transistor cell is electrically connected to a first node through a metal line in the first metal layer and through a metal line in the second metal layer where the metal lines are electrically isolated from the metal lines connecting the transistor cells of the power transistor. The sense transistor cells measure a small portion of the current flowing through the power transistor based on the size ratio of the current sense device and the power transistor.
摘要翻译：描述了用于功率晶体管的电流检测器件。功率晶体管形成在包括晶体管单元的蜂窝阵列的蜂窝结构中。电流检测器件包括用作检测晶体管单元的功率晶体管的晶体管单元的蜂窝阵列中的多个晶体管单元。感测晶体管单元均匀分布在整个蜂窝阵列中，其中每个感测晶体管单元的源极端通过第一金属层中的金属线电连接到第一节点，并通过第二金属层中的金属线，金属线与连接功率晶体管的晶体管单元的金属线电隔离。感测晶体管单元基于电流检测器件和功率晶体管的尺寸比来测量流过功率晶体管的电流的一小部分。

6. 发明授权

US06741194B1 Methods and apparatus for detecting out-of-range signals in an analog-to-digital converter 有权
标题翻译：用于在模拟 - 数字转换器中检测超出范围信号的方法和装置
公开(公告)号：US06741194B1
公开(公告)日：2004-05-25
申请号：US10328360
申请日：2002-12-23
申请人： Thierry Cassagnes , Douglas A. Garrity , Ira G. Miller
发明人： Thierry Cassagnes , Douglas A. Garrity , Ira G. Miller
IPC分类号： H03M106
CPC分类号： H03M1/183 , H03M1/0695 , H03M1/129 , H03M1/187 , H03M1/44
摘要： An analog-to-digital (A/D) converter suitable for use with redundant signed digit (RSD) coverter stages is provided with an out-of-range (OOR) detection circuit. If an out-of-range input signal is detected, the detection circuit identifies the OOR condition so that the converter can take remedial action. Examples of remedial action may include adjusting the gain of one or more converter stages, adjusting the analog input signal provided to one or more converter stages, and/or adjusting the digital output of the converter to reflect the OOR condition. The ORR detection circuit may receive its input from a converter stage that is distinct from the stage providing the most significant bit (MSB) of the digital output to preserve the resolution of the most significant bit.
摘要翻译：适用于冗余有符号数字（RSD）覆盖器级的模拟（A / D）转换器提供超范围（OOR）检测电路。如果检测到超出范围的输入信号，则检测电路识别OOR条件，以便转换器可以采取补救措施。补救措施的示例可以包括调整一个或多个转换器级的增益，调整提供给一个或多个转换器级的模拟输入信号和/或调整转换器的数字输出以反映OOR条件。 ORR检测电路可以从与提供数字输出的最高有效位（MSB）的级不同的转换器级接收其输入，以保持最高有效位的分辨率。

7. 发明申请

US20110309873A1 CIRCUIT HAVING GATE DRIVERS HAVING A LEVEL SHIFTER 有权
标题翻译：具有水平移位器的门驱动器的电路
公开(公告)号：US20110309873A1
公开(公告)日：2011-12-22
申请号：US12818235
申请日：2010-06-18
申请人： IRA G. MILLER , Ricardo Takase Goncalves , Geoffrey W. Perkins
发明人： IRA G. MILLER , Ricardo Takase Goncalves , Geoffrey W. Perkins
IPC分类号： H03L5/00
CPC分类号： H03K19/018521
摘要： A circuit comprises a first level shifting circuit. The level shifting circuit comprises a first and second latching differential pairs. The first latching differential pair has first and second inputs for receiving first and second input signals, first and second outputs, and first and second power supply voltage terminals for receiving a first power supply voltage. The second latching differential pair has first and second inputs coupled to the first and second outputs of the first latching differential pair, an output, and first and second power supply voltage terminals for receiving a second power supply voltage, the second power supply voltage being different from the first power supply voltage. In one embodiment, the level shifting circuit protects transistor gates of the circuit from an overvoltage.
摘要翻译：电路包括第一电平移位电路。电平移位电路包括第一和第二锁存差分对。第一锁存差分对具有用于接收第一和第二输入信号的第一和第二输入端，第一和第二输出端以及用于接收第一电源电压的第一和第二电源电压端子。第二锁存差分对具有耦合到第一锁存差分对的第一和第二输出的第一和第二输入，输出以及用于接收第二电源电压的第一和第二电源电压端子，第二电源电压是不同的从第一个电源电压。在一个实施例中，电平移位电路保护电路的晶体管栅极免受过电压。

8. 发明授权

US07638995B2 Clocked ramp apparatus for voltage regulator softstart and method for softstarting voltage regulators 有权
标题翻译：用于稳压器软启动的时钟斜坡装置和软启动稳压器的方法
公开(公告)号：US07638995B2
公开(公告)日：2009-12-29
申请号：US11038746
申请日：2005-01-18
申请人： Brett J. Thompsen , Ira G. Miller , Eduardo Velarde, Jr.
发明人： Brett J. Thompsen , Ira G. Miller , Eduardo Velarde, Jr.
IPC分类号： G05F1/00
CPC分类号： G05F1/468 , Y10S323/901
摘要： Methods and apparatus for softstarting a voltage regulation circuit. A circuit for generating an output voltage at an output thereof includes a capacitor having a first terminal configured to be coupled to a reference potential and having a second terminal coupled to the output, and a switchable current source coupled to the capacitor for intermittently charging the capacitor until the output voltage is reached.
摘要翻译：软启动电压调节电路的方法和装置。用于在其输出处产生输出电压的电路包括电容器，其具有被配置为耦合到参考电位并且具有耦合到输出的第二端子的第一端子，以及耦合到电容器的可切换电流源，用于间歇地对电容器充电直到达到输出电压。

9. 发明申请

US20090184655A1 POWER MANAGEMENT SYSTEM FOR LIGHT EMITTING DIODES 审中-公开
标题翻译：用于发光二极管的电源管理系统
公开(公告)号：US20090184655A1
公开(公告)日：2009-07-23
申请号：US12017474
申请日：2008-01-22
申请人： Ira G. Miller , Eduardo Velarde
发明人： Ira G. Miller , Eduardo Velarde
IPC分类号： H05B37/02
CPC分类号： H05B33/0815
摘要： A power management system comprising: providing a one pin driver circuit; sourcing a managed current from the one pin driver circuit; and illuminating a light emitting diode by the managed current including reducing the managed current when the light emitting diode is not coupled.
摘要翻译：一种电源管理系统，包括：提供一个引脚驱动电路; 从一个引脚驱动器电路采集管理电流; 以及通过所述管理电流照射发光二极管，包括当所述发光二极管未耦合时降低所述管理电流。

10. 发明授权

US07091712B2 Circuit for performing voltage regulation 有权
标题翻译：执行电压调节的电路
公开(公告)号：US07091712B2
公开(公告)日：2006-08-15
申请号：US10843805
申请日：2004-05-12
申请人： Ira G. Miller , Brett J. Thompsen , Eduardo Velarde, Jr.
发明人： Ira G. Miller , Brett J. Thompsen , Eduardo Velarde, Jr.
IPC分类号： G05F1/567
CPC分类号： G05F3/267
摘要： A circuit (10, 100) is used to perform voltage regulation. In one embodiment, a voltage regulator (11) is used in conjunction with an output transistor (24) to form a circuit (10) which operates to regulate the voltage drop from a first node (30) to a second node (28). This second node (28) may be used to provide power to circuitry (27). The areas of several transistors (20–25) in circuit (10) may be adjusted so that negative and positive temperature coefficients may be balanced such that the circuit (10) behaves as desired over a range of voltages and temperatures. Note that in one embodiment, circuit (10) is a 2-terminal device.
摘要翻译：电路（10,100）用于执行电压调节。在一个实施例中，电压调节器（11）与输出晶体管（24）结合使用以形成用于调节从第一节点（30）到第二节点（28）的电压降的电路（10）。该第二节点（28）可用于向电路（27）提供电力。可以调节电路（10）中的几个晶体管（20-25）的面积，使得负和正温度系数可以被平衡，使得电路（10）在电压和温度的范围内按照期望的方式工作。注意，在一个实施例中，电路（10）是2端子装置。

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