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1. 发明授权

US08691686B2 Method of manufacturing semiconductor device, semiconductor device, and electronic apparatus 有权
标题翻译：制造半导体器件，半导体器件和电子设备的方法
公开(公告)号：US08691686B2
公开(公告)日：2014-04-08
申请号：US13439020
申请日：2012-04-04
申请人： Ikue Mitsuhashi
发明人： Ikue Mitsuhashi
IPC分类号： H01L21/4763
CPC分类号： H01L27/14687 , H01L21/76898 , H01L23/481 , H01L27/14634 , H01L27/14636 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device, includes: forming a first circuit substrate having a first interconnection; forming a second circuit substrate having a second interconnection; bonding the first circuit substrate to the top surface of the second circuit substrate so as to be stacked facing each other; and performing an etching process of simultaneously removing parts formed on the first interconnection and the second interconnection in a stacked body of the first circuit substrate and the second circuit substrate so as to form a first opening in the top surface of the first interconnection and to form a second opening in the top surface of the second interconnection. The forming of the first circuit substrate includes forming an etching stopper layer on the surface of the first interconnection out of a material having an etching rate lower than that of the first interconnection in the etching process.
摘要翻译：一种制造半导体器件的方法，包括：形成具有第一互连的第一电路基板; 形成具有第二互连的第二电路基板; 将所述第一电路基板接合到所述第二电路基板的顶表面，以便彼此相对堆叠; 以及执行在第一电路基板和第二电路基板的层叠体中同时去除形成在第一互连件和第二互连件上的部件的蚀刻工艺，以便在第一互连件的顶表面中形成第一开口并形成在第二互连的顶表面中的第二开口。第一电路基板的形成包括在蚀刻工艺中在比第一互连的蚀刻速率低的材料的第一互连表面上形成蚀刻停止层。

2. 发明授权

US09153490B2 Solid-state imaging device, manufacturing method of solid-state imaging device, manufacturing method of semiconductor device, semiconductor device, and electronic device 有权
标题翻译：固态成像装置，固态成像装置的制造方法，半导体装置的制造方法，半导体装置以及电子装置
公开(公告)号：US09153490B2
公开(公告)日：2015-10-06
申请号：US13547698
申请日：2012-07-12
申请人： Ikue Mitsuhashi , Kentaro Akiyama , Koji Kikuchi
发明人： Ikue Mitsuhashi , Kentaro Akiyama , Koji Kikuchi
IPC分类号： H01L21/768 , H01L23/48 , H01L27/146
CPC分类号： H01L27/14636 , H01L21/76898 , H01L23/481 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/1469 , H01L2224/08145 , H01L2224/80896 , H01L2224/82 , H01L2224/92 , H01L2924/0002 , H01L2924/00 , H01L2224/80001
摘要： A solid-state imaging device has a sensor substrate having a pixel region on which photoelectric converters are arrayed; a driving circuit provided on a front face side that is opposite from a light receiving face as to the photoelectric converters on the sensor substrate; an insulation layer, provided on the light receiving face, and having a stepped construction wherein the film thickness of the pixel region is thinner than the film thickness in a periphery region provided on the outside of the pixel region; a wiring provided to the periphery region on the light receiving face side; and on-chip lenses provided to positions corresponding to the photoelectric converters on the insulation layer.
摘要翻译：固态成像装置具有传感器基板，其具有排列有光电转换器的像素区域; 驱动电路，其设置在与所述传感器基板上的所述光电转换器的受光面相反的正面侧; 设置在所述受光面上的绝缘层，并且具有阶梯状结构，其中像素区域的膜厚度比设置在像素区域的外侧的周边区域的膜厚薄; 设置在光接收面侧的周边区域的布线; 以及设置在绝缘层上对应于光电转换器的位置的片上透镜。

3. 发明申请

US20130020468A1 SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE 有权
公开(公告)号：US20130020468A1
公开(公告)日：2013-01-24
申请号：US13547698
申请日：2012-07-12
申请人： Ikue Mitsuhashi , Kentaro Akiyama , Koji Kikuchi
发明人： Ikue Mitsuhashi , Kentaro Akiyama , Koji Kikuchi
IPC分类号： H01L27/146 , H01L21/768 , H01L23/485 , H01L31/18 , H01L31/0216
CPC分类号： H01L27/14636 , H01L21/76898 , H01L23/481 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/1469 , H01L2224/08145 , H01L2224/80896 , H01L2224/82 , H01L2224/92 , H01L2924/0002 , H01L2924/00 , H01L2224/80001
摘要： A solid-state imaging device has a sensor substrate having a pixel region on which photoelectric converters are arrayed; a driving circuit provided on a front face side that is opposite from a light receiving face as to the photoelectric converters on the sensor substrate; an insulation layer, provided on the light receiving face, and having a stepped construction wherein the film thickness of the pixel region is thinner than the film thickness in a periphery region provided on the outside of the pixel region; a wiring provided to the periphery region on the light receiving face side; and on-chip lenses provided to positions corresponding to the photoelectric converters on the insulation layer.

4. 发明申请

US20120256319A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS 有权
标题翻译：制造半导体器件，半导体器件和电子设备的方法
公开(公告)号：US20120256319A1
公开(公告)日：2012-10-11
申请号：US13439020
申请日：2012-04-04
申请人： Ikue Mitsuhashi
发明人： Ikue Mitsuhashi
IPC分类号： H01L23/522 , H01L31/18
CPC分类号： H01L27/14687 , H01L21/76898 , H01L23/481 , H01L27/14634 , H01L27/14636 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device, includes: forming a first circuit substrate having a first interconnection; forming a second circuit substrate having a second interconnection; bonding the first circuit substrate to the top surface of the second circuit substrate so as to be stacked facing each other; and performing an etching process of simultaneously removing parts formed on the first interconnection and the second interconnection in a stacked body of the first circuit substrate and the second circuit substrate so as to form a first opening in the top surface of the first interconnection and to form a second opening in the top surface of the second interconnection. The forming of the first circuit substrate includes forming an etching stopper layer on the surface of the first interconnection out of a material having an etching rate lower than that of the first interconnection in the etching process.
摘要翻译：一种制造半导体器件的方法，包括：形成具有第一互连的第一电路基板; 形成具有第二互连的第二电路基板; 将所述第一电路基板接合到所述第二电路基板的顶表面，以便彼此相对堆叠; 以及执行在第一电路基板和第二电路基板的层叠体中同时去除形成在第一互连件和第二互连件上的部件的蚀刻工艺，以便在第一互连件的顶表面中形成第一开口并形成在第二互连的顶表面中的第二开口。第一电路基板的形成包括在蚀刻工艺中在比第一互连的蚀刻速率低的材料的第一互连表面上形成蚀刻停止层。

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