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1. 发明授权

US07468302B2 Method of forming trench type isolation film of semiconductor device 失效
标题翻译：形成半导体器件沟槽型隔离膜的方法
公开(公告)号：US07468302B2
公开(公告)日：2008-12-23
申请号：US11440532
申请日：2006-05-25
申请人： Hyeon Sang Shin
发明人： Hyeon Sang Shin
IPC分类号： H01L21/336 , H01L21/76 , H01L21/311
CPC分类号： H01L21/76229 , H01L21/76232 , H01L27/1052
摘要： A method of forming a trench type isolation film of a semiconductor device, including the steps of sequentially forming a pad oxide film and a nitride film for a hard mask on a semiconductor substrate in which a cell region and a peri region are defined; patterning the nitride film using an etch process employing a cell array mask; coating a photoresist on the entire structure including the patterned nitride film; patterning the photoresist using a peri ISO mask; sequentially etching the nitride film, the pad oxide film, and the semiconductor substrate using the patterned photoresist as an etch mask, thereby forming first trenches; stripping the photoresist; etching the semiconductor substrate of the cell region and the peri region using the patterned nitride film as an etch mask, thereby forming second trenches in the cell region and third trenches, which are consecutive to the first trenches, in the peri region; and, forming an isolation film within the second and third trenches. The invention can prevent dislocation depending the concentration of stress on micro trenches and can improve field leakage characteristics.
摘要翻译：一种形成半导体器件的沟槽型隔离膜的方法，包括以下步骤：在限定了单元区域和周边区域的半导体衬底上顺序地形成用于硬掩模的衬垫氧化膜和氮化物膜; 使用采用电池阵列掩模的蚀刻工艺对氮化物膜进行构图; 在包括图案化的氮化物膜的整个结构上涂覆光致抗蚀剂; 使用peri ISO掩模对光致抗蚀剂进行图案化; 使用图案化的光致抗蚀剂作为蚀刻掩模，顺序地蚀刻氮化物膜，衬垫氧化物膜和半导体衬底，从而形成第一沟槽; 剥离光刻胶; 使用图案化氮化物膜蚀刻单元区域和周边区域的半导体衬底作为蚀刻掩模，从而在围绕区域的与第一沟槽连续的单元区域和第三沟槽中形成第二沟槽; 以及在第二和第三沟槽内形成隔离膜。本发明可以根据微沟槽上的应力集中来防止位错，并且可以改善漏电特性。

2. 发明授权

US06955957B2 Method of forming a floating gate in a flash memory device 失效
标题翻译：在闪速存储器件中形成浮动栅极的方法
公开(公告)号：US06955957B2
公开(公告)日：2005-10-18
申请号：US10616508
申请日：2003-07-10
申请人： Hyeon Sang Shin
发明人： Hyeon Sang Shin
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , H01L21/337 , H01L21/331 , H01L21/336 , H01L21/76 , H01L21/8238 , H01L21/8242
CPC分类号： H01L27/11521 , H01L27/115
摘要： Disclosed is a method of forming the floating gate in the flash memory device. After the first polysilicon film is deposited on the semiconductor substrate, the trench is formed on the first polysilicon film with the pad nitride film not deposited. The HDP oxide film is then deposited to bury the trench. Next, the HDP oxide film is etched to define a portion where the second polysilicon film will be deposited in advance. The second polysilicon film is then deposited on the entire top surface, thus forming the floating gate. Thus, it is possible to completely remove a moat and an affect on EFH (effective field oxide height), solve a wafer stress by simplified process and a nitride film, and effectively improve the coupling ratio of the flash memory device.
摘要翻译：公开了一种在闪速存储器件中形成浮动栅极的方法。在第一多晶硅膜沉积在半导体衬底上之后，沟槽形成在第一多晶硅膜上，而不会沉积衬垫氮化物膜。然后沉积HDP氧化物膜以埋入沟槽。接下来，蚀刻HDP氧化物膜以限定预先将第二多晶硅膜沉积的部分。然后将第二多晶硅膜沉积在整个顶表面上，从而形成浮栅。因此，可以完全去除护城河和对EFH（有效场氧化物高度）的影响，通过简化的工艺和氮化物膜来解决晶片应力，并有效地提高闪存器件的耦合比。

3. 发明授权

US06849503B1 Method for forming metal interconnections for flash memory device 失效
标题翻译：用于形成闪存器件的金属互连的方法
公开(公告)号：US06849503B1
公开(公告)日：2005-02-01
申请号：US10744426
申请日：2003-12-22
申请人： Hyeon Sang Shin
发明人： Hyeon Sang Shin
IPC分类号： H01L21/768 , H01L21/8247 , H01L27/105 , H01L27/115 , H01L21/336
CPC分类号： H01L27/11526 , H01L21/76838 , H01L27/105 , H01L27/115 , H01L27/11529 , H01L27/11546
摘要： To form metal interconnections in a flash memory device, the gate of the peripheral region is etched to form a first contact hole on a substrate. Silicon nitride and first oxide films are formed on the gate including the first contact hole. The first oxide film is etched to expose the source and filled by a first plug. A second oxide film is formed and etched with the first oxide films to form second contact holes exposing the drain, the source, and the first contact hole that are filled by second plugs. A third oxide film is formed and etched to form third contact holes exposing the first and second plugs and a portion of the second oxide film corresponding to the drain. The second and first oxide films are etched to form fourth contact holes exposing the first and second plugs and the drain. Metal interconnections fills the fourth contact holes.
摘要翻译：为了在闪速存储器件中形成金属互连，蚀刻外围区域的栅极以在衬底上形成第一接触孔。在包括第一接触孔的栅极上形成氮化硅和第一氧化物膜。蚀刻第一氧化物膜以暴露源并由第一插塞填充。形成第二氧化膜并用第一氧化膜进行蚀刻，形成第二接触孔，露出由第二插塞填充的漏极，源极和第一接触孔。形成并蚀刻第三氧化物膜以形成暴露第一和第二插塞的第三接触孔以及与漏极对应的第二氧化膜的一部分。蚀刻第二和第一氧化物膜以形成暴露第一和第二插塞和漏极的第四接触孔。金属互连填充第四个接触孔。

4. 发明授权

US06465321B1 Method of forming a storage node in a semiconductor device 失效
标题翻译：在半导体器件中形成存储节点的方法
公开(公告)号：US06465321B1
公开(公告)日：2002-10-15
申请号：US09722505
申请日：2000-11-28
申请人： Hyeon Sang Shin , Chang Heon Park , Myung Pil Kim
发明人： Hyeon Sang Shin , Chang Heon Park , Myung Pil Kim
IPC分类号： H01L2120
CPC分类号： H01L28/60 , H01L21/32139 , H01L28/55
摘要： There is disclosed a method of forming a storage node in a semiconductor device capable of forming a storage node in a vertical structure, by forming a hard mask used to form a noble storage node using a TiN film deposited in a spacer shape on an oxide film and over the oxide film.
摘要翻译：公开了一种在能够形成垂直结构的存储节点的半导体器件中形成存储节点的方法，通过使用在氧化膜上以间隔物形式沉积的TiN膜形成用于形成贵重存储节点的硬掩模并在氧化膜上方。

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