专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20160314678A1 WHISTLE CAPABLE OF DETECTING AIR PRESSURE 审中-公开
标题翻译：检测空气压力的能力
公开(公告)号：US20160314678A1
公开(公告)日：2016-10-27
申请号：US15134113
申请日：2016-04-20
申请人： Chia-Hung HSIEH
发明人： Chia-Hung HSIEH
IPC分类号： G08B21/18 , G01F1/66 , G10K5/00
CPC分类号： G01F1/666 , G01L7/024 , G10K5/00
摘要： A whistle capable of detecting an air pressure includes a housing and a circuit board module. The housing further includes a shell body and a division assembly. The shell body has an interior space. The division assembly dividing the interior space into an air chamber and an accommodation chamber further has a detection opening communicative in space with the air chamber. The air chamber has a blow hole for a user to blow an air into the air chamber. The circuit board module located in the shell body includes a main board and an air-pressure sensor. The main board partly at least located in the accommodation chamber has an air-detecting region respective to the detection opening The air-pressure sensor mounted in the air-detecting region is to detect the air and to transmit a corresponding detection signal upon detecting the air.
摘要翻译：能够检测气压的口哨包括壳体和电路板模块。壳体还包括壳体和分割组件。壳体具有内部空间。将内部空间分成空气室和容纳室的分割组件还具有与空气室在空间中连通的检测开口。空气室具有用于使用者将空气吹入空气室的吹气孔。位于壳体中的电路板模块包括主板和空气压力传感器。部分地至少位于容纳室中的主板具有与检测开口相对应的空气检测区域安装在空气检测区域中的空气压力传感器用于检测空气并在检测到空气时发送相应的检测信号。

2. 发明授权

US09397729B2 Through chip coupling for signal transport 有权
标题翻译：通过芯片耦合进行信号传输
公开(公告)号：US09397729B2
公开(公告)日：2016-07-19
申请号：US12946072
申请日：2010-11-15
申请人： Tzu-Jin Yeh , Hsieh-Hung Hsieh , Jun-De Jin , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Tzu-Jin Yeh , Hsieh-Hung Hsieh , Jun-De Jin , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H04B5/00
CPC分类号： H04B5/0081
摘要： Through-chip coupling is utilized for signal transport, where an interface is formed between a first coil on a first integrated circuit (IC) chip and a second coil on a second IC chip. The first coil is coupled to an antenna. The second coil is coupled to an amplifier circuit. The second coil is not in direct contact with the first coil. The first coil and the second coil communicatively transmit signals between the antenna and the first amplifier circuit.
摘要翻译：芯片耦合用于信号传输，其中在第一集成电路（IC）芯片上的第一线圈和第二IC芯片上的第二线圈之间形成接口。第一线圈耦合到天线。第二线圈耦合到放大器电路。第二线圈不与第一线圈直接接触。第一线圈和第二线圈在天线和第一放大器电路之间通信地传送信号。

3. 发明授权

US08981350B2 Pixel structure of organic light emitting diode display 有权
标题翻译：有机发光二极管显示器的像素结构
公开(公告)号：US08981350B2
公开(公告)日：2015-03-17
申请号：US13009835
申请日：2011-01-19
申请人： Hsing-Hung Hsieh
发明人： Hsing-Hung Hsieh
IPC分类号： H01L51/00 , H01L27/32 , H01L27/12
CPC分类号： H01L27/3244 , H01L27/1214 , H01L27/1225 , H01L27/1251
摘要： A pixel structure of an organic light emitting diode display includes a first transistor and a second transistor. The first transistor includes a first drain electrode and a first source electrode. When a voltage difference is provided between the first drain electrode and the first source electrode, the first transistor has a first subthreshold slope (SS). The second transistor includes a second drain electrode and a second source electrode. When the voltage difference is provided between the second drain electrode and the second source electrode, the second transistor has a second SS, and the second SS is larger than the first SS.
摘要翻译：有机发光二极管显示器的像素结构包括第一晶体管和第二晶体管。第一晶体管包括第一漏电极和第一源电极。当在第一漏电极和第一源电极之间提供电压差时，第一晶体管具有第一阈值斜率（SS）。第二晶体管包括第二漏电极和第二源电极。当在第二漏电极和第二源电极之间设置电压差时，第二晶体管具有第二SS，第二SS大于第一SS。

4. 发明授权

US08890626B2 Divider-less phase locked loop (PLL) 有权
标题翻译：无分频锁相环（PLL）
公开(公告)号：US08890626B2
公开(公告)日：2014-11-18
申请号：US13586033
申请日：2012-08-15
申请人： Yen-Jen Chen , I-Ting Lee , Hsieh-Hung Hsieh , Chewn-Pu Jou , Fu-Lung Hsueh , Shen-Iuan Liu
发明人： Yen-Jen Chen , I-Ting Lee , Hsieh-Hung Hsieh , Chewn-Pu Jou , Fu-Lung Hsueh , Shen-Iuan Liu
IPC分类号： H03K3/03
CPC分类号： H03K3/0322 , H03K3/0315 , H03L7/083 , H03L7/087 , H03L7/089 , H03L7/099
摘要： One or more techniques and systems for a divider-less phase locked loop (PLL) and associated phase detector (PD) are provided herein. In some embodiments, a pulse phase detector (pulsePD) signal, a voltage controlled oscillator positive differential (VCOP) signal, and a voltage controlled oscillator negative differential (VCON) signal are received. An up signal and a down signal for a first charge pump (CP) and an up signal and a down signal for a second CP are generated based on the pulsePD signal, the VCOP signal, and the VCON signal. For example, CP signals are generated to control the first CP and the second CP, respectively. In some embodiments, CP signals are generated such that the CPs facilitate adjustment of a zero crossing phase of the VCON and VCOP signals with respect to the pulsePD signal. In this manner, a divider-less PLL is provided, thus mitigating PLL power consumption.
摘要翻译：本文提供了一种用于无分频锁相环（PLL）和相关相位检测器（PD）的技术和系统。在一些实施例中，接收脉冲相位检测器（pulsePD）信号，压控振荡器正差分（VCOP）信号和压控振荡器负差分（VCON）信号。基于pulsePD信号，VCOP信号和VCON信号产生用于第一电荷泵（CP）的上升信号和下降信号以及用于第二CP的上升信号和下降信号。例如，生成CP信号以分别控制第一CP和第二CP。在一些实施例中，产生CP信号，使得CP有助于调整相对于pulsePD信号的VCON和VCOP信号的零交叉相位。以这种方式，提供无分频PLL，从而减轻PLL功耗。

5. 发明授权

US08823894B2 Frame, backlight module and liquid crystal display module and method of fabricating the frame thereof 有权
标题翻译：框架，背光模块和液晶显示模块及其框架的制造方法
公开(公告)号：US08823894B2
公开(公告)日：2014-09-02
申请号：US12970967
申请日：2010-12-17
申请人： Chih-Wei Chang , Po-Chun Hsu , Kun-Hung Hsieh
发明人： Chih-Wei Chang , Po-Chun Hsu , Kun-Hung Hsieh
IPC分类号： G02F1/1333 , G02F1/1335
CPC分类号： G02B6/0085 , G02B6/0088 , G02B6/009
摘要： A frame formed by cutting and bending a plate base is provided. The maximum thickness of the frame is T, the thickness of the plate base is t, and 1.5t≦T≦2.5t. The frame includes a first plate element, a second plate element, and a bending portion. The second plate element is directly contacted to the first plate element, and the first plate element is substantially parallel to the second plate element. The bending portion is connected between the first plate element and the second plate element. A backlight module using the above-mentioned frame and a liquid crystal display (LCD) module using the backlight module are also provided.
摘要翻译：提供了通过切割和弯曲板底座形成的框架。框架的最大厚度为T，板底的厚度为t，1.5t＆nlE; T＆nlE; 2.5t。框架包括第一板元件，第二板元件和弯曲部分。第二板元件直接接触第一板元件，第一板元件基本上平行于第二板元件。弯曲部分连接在第一板元件和第二板元件之间。还提供了使用上述框架的背光模块和使用背光模块的液晶显示器（LCD）模块。

6. 发明授权

US08729968B2 Built-in self-test circuit for voltage controlled oscillators 有权
标题翻译：用于压控振荡器的内置自检电路
公开(公告)号：US08729968B2
公开(公告)日：2014-05-20
申请号：US13103571
申请日：2011-05-09
申请人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03L5/00
CPC分类号： G01R31/2824
摘要： A built-in self-test circuit for testing a voltage controlled oscillator comprises a voltage controlled oscillator, a buffer having an input coupled to an output of the voltage controlled oscillator and a radio frequency peak detector coupled to the output of the buffer. The radio frequency peak detector is configured to receive an ac signal from the voltage controlled oscillator and generate a dc value proportional to the ac signal at an output of the radio frequency peak detector. Furthermore, the output of the radio frequency peak detector generates a dc value proportional to an amplitude of the ac signal from the voltage controlled oscillator when the voltage controlled oscillator functions correctly. On the other hand, the output of the radio frequency peak detector is at zero volts when the voltage controlled oscillator fails to generate an ac signal.
摘要翻译：用于测试压控振荡器的内置自检电路包括压控振荡器，具有耦合到压控振荡器的输出的输入的缓冲器和耦合到缓冲器的输出的射频峰值检测器。射频峰值检测器被配置为从压控振荡器接收交流信号，并且在射频峰值检测器的输出处产生与ac信号成比例的直流值。此外，当压控振荡器正常工作时，射频峰值检测器的输出产生与来自压控振荡器的ac信号的幅度成比例的直流值。另一方面，当压控振荡器不能产生交流信号时，射频峰值检测器的输出为零伏特。

7. 发明授权

US08698712B2 Pixel structure of active matrix organic electroluminescent display panel and method of making the same 有权
标题翻译：有源矩阵有机电致发光显示面板的像素结构及其制作方法
公开(公告)号：US08698712B2
公开(公告)日：2014-04-15
申请号：US13048903
申请日：2011-03-16
申请人： Hsing-Hung Hsieh
发明人： Hsing-Hung Hsieh
IPC分类号： G09G3/30
CPC分类号： H01L27/3267 , G09G3/3406 , G09G2320/064 , G09G2330/08
摘要： A pixel structure of active matrix organic electroluminescent display panel includes a first light emitting device, a first driving switching device electrically connected to the first light emitting device for driving the first light emitting device, a second light emitting device, a second driving switching device electrically connected to the second light emitting device for driving the second light emitting device, and at least one addressing switching device electrically connected to at least one of the first driving switching device and the second driving switching device.
摘要翻译：有源矩阵有机电致发光显示面板的像素结构包括第一发光器件，电连接到用于驱动第一发光器件的第一发光器件的第一驱动开关器件，第二发光器件，第二驱动开关器件连接到用于驱动第二发光器件的第二发光器件，以及电连接到第一驱动开关器件和第二驱动开关器件中的至少一个的至少一个寻址开关器件。

8. 发明授权

US08664729B2 Methods and apparatus for reduced gate resistance finFET 有权
标题翻译：降低栅极电阻finFET的方法和装置
公开(公告)号：US08664729B2
公开(公告)日：2014-03-04
申请号：US13325922
申请日：2011-12-14
申请人： Chewn-Pu Jou , Tzu-Jin Yeh , Hsieh-Hung Hsieh
发明人： Chewn-Pu Jou , Tzu-Jin Yeh , Hsieh-Hung Hsieh
IPC分类号： H01L27/088
CPC分类号： H01L29/66795 , H01L29/42372 , H01L29/785
摘要： Methods and apparatus for reduced gate resistance finFET. A metal gate transistor structure is disclosed including a plurality of semiconductor fins formed over a semiconductor substrate, the fins being arranged in parallel and spaced apart; a metal containing gate electrode formed over the semiconductor substrate and overlying a channel gate region of each of the semiconductor fins, and extending over the semiconductor substrate between the semiconductor fins; an interlevel dielectric layer overlying the gate electrode and the semiconductor substrate; and a plurality of contacts disposed in the interlevel dielectric layer and extending through the interlevel dielectric layer to the gate electrode; a low resistance metal strap formed over the interlevel dielectric layer and coupled to the gate electrode by the plurality of contacts; wherein the plurality of contacts are spaced apart from the channel gate regions of the semiconductor fins. Methods for forming the reduced gate finFET are disclosed.
摘要翻译：降低栅极电阻finFET的方法和装置。公开了一种金属栅极晶体管结构，其包括形成在半导体衬底上的多个半导体鳍片，所述鳍片平行布置并间隔开; 一个含金属的栅电极，形成在半导体衬底之上，并且覆盖每个半导体鳍片的沟道栅极区域，并且在半导体鳍片之间的半导体衬底上延伸; 覆盖所述栅电极和所述半导体衬底的层间电介质层; 以及多个触点，其布置在所述层间电介质层中并且延伸穿过所述层间电介质层到所述栅电极; 形成在所述层间电介质层上并且由所述多个触点耦合到所述栅电极的低电阻金属带; 其中所述多个触点与所述半导体鳍片的沟道栅极区域间隔开。公开了形成栅极finFET的方法。

9. 发明授权

US08576198B2 Digital capacitive touch panel structure 失效
公开(公告)号：US08576198B2
公开(公告)日：2013-11-05
申请号：US13584674
申请日：2012-08-13
申请人： Hsueh-Chih Chiang , Shih-Liang Chou , Jyh-An Chen , Ming-Hung Hsieh
发明人： Hsueh-Chih Chiang , Shih-Liang Chou , Jyh-An Chen , Ming-Hung Hsieh
IPC分类号： G06F3/045
CPC分类号： G06F3/044
摘要： The present invention discloses a touch panel structure formed by an anti-scratch surface layer and a capacitive sensor layer, and a transparent lamination layer is used for pasting the two into a panel. The capacitive sensor layer includes an X-axis first transparent conductive layer and a Y-axis second transparent conductive layer formed on both sides of a transparent plastic carrier to provide a touch panel structure having the advantages of a relatively low material cost, a light weight, an easy manufacturing and molding, a better lamination yield and a flexible and break-free feature.

10. 发明申请

US20130270546A1 ACTIVE DEVICE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译：主动装置及其制作方法
公开(公告)号：US20130270546A1
公开(公告)日：2013-10-17
申请号：US13531600
申请日：2012-06-25
申请人： Chih-Pang Chang , Hsing-Hung Hsieh
发明人： Chih-Pang Chang , Hsing-Hung Hsieh
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78603
摘要： An active device and a fabricating method thereof are provided. The active device includes a buffer layer, a channel, a gate, a gate insulation layer, a source and a drain. The buffer layer is disposed on a substrate and has a positioning region. A thickness of a portion of the buffer layer in the positioning region is greater than a thickness of a portion of the buffer layer outside the positioning region. The channel is disposed on the buffer layer and in the positioning region. The gate is disposed above the channel. The gate insulation layer is disposed between the channel and the gate. The source and the drain are disposed above the channel and electrically connected to the channel.
摘要翻译：提供了一种有源器件及其制造方法。有源器件包括缓冲层，沟道，栅极，栅极绝缘层，源极和漏极。缓冲层设置在基板上并具有定位区域。定位区域中的缓冲层的一部分的厚度大于定位区域外的缓冲层的一部分的厚度。通道设置在缓冲层上和定位区域中。门设置在通道上方。栅极绝缘层设置在通道和栅极之间。源极和漏极设置在通道上方并电连接到通道。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式