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1. 发明授权

US06724052B2 Semiconductor device and method of fabricating a semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06724052B2
公开(公告)日：2004-04-20
申请号：US10194300
申请日：2002-07-15
申请人： Kang-Sik Cho , Hoo-Seung Cho , Gyu-Chul Kim , Yong Park , Han-Soo Kim
发明人： Kang-Sik Cho , Hoo-Seung Cho , Gyu-Chul Kim , Yong Park , Han-Soo Kim
IPC分类号： H01L2976
CPC分类号： H01L21/823443 , H01L21/28518 , H01L21/823425 , H01L29/665 , H01L29/66659
摘要： A semiconductor device includes a substrate of a first conductive type, and a well region of an opposite second conductive type is formed in the substrate. A first impurity region of the first conductive type extends to a first depth within the well region, and a second impurity region of the first conductive type is spaced from the first impurity region to define a channel region therebetween and extends to a second depth within the well region. Preferably, the second depth is greater than the first depth. A gate electrode is located over the channel region, and a silicide layer is formed at a third depth within the first impurity region. The third depth is less than the first depth, and a difference between the first depth and the third depth is less than or equal to a difference at which a leakage current from the silicide layer to the well region is sufficient to electrically bias the well region through the silicide layer.
摘要翻译：半导体器件包括第一导电类型的衬底，并且在衬底中形成相对的第二导电类型的阱区。第一导电类型的第一杂质区域延伸到阱区域内的第一深度，并且第一导电类型的第二杂质区域与第一杂质区域间隔开，以在其间限定沟道区域，并延伸到第井区。优选地，第二深度大于第一深度。栅极电极位于沟道区域的上方，在第一杂质区域内的第三深度处形成硅化物层。第三深度小于第一深度，第一深度和第三深度之间的差小于或等于从硅化物层到阱区域的漏电流足以使阱区域电偏置的差通过硅化物层。

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