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1. 发明授权

US08645583B2 Zero pin serial interface 有权
标题翻译：零针串行接口
公开(公告)号：US08645583B2
公开(公告)日：2014-02-04
申请号：US13075617
申请日：2011-03-30
申请人： Hoa Vu , Ping Huang
发明人： Hoa Vu , Ping Huang
IPC分类号： H01H37/76
CPC分类号： G01R31/2884
摘要： A method for controlling performance of an integrated circuit using a zero-pin serial interface is provided. The method comprises identifying a desired performance characteristic of the circuit, and transmitting a first change mode signal to the circuit on a first pin to cause the circuit to enter an instruction reception mode, with the first pin performing differently during a normal operation mode. The method also comprises transmitting a performance adjusting instruction to the circuit on a second pin when the circuit is in the instruction reception mode, with the second pin performing differently during the normal operation mode, and transmitting a second change mode signal to the circuit on the first pin to cause the circuit to enter the normal operation mode. An output performance of the circuit is compared to the desired performance characteristic, with the output performance being the performance of the circuit during the normal operation mode. The circuit is set to permanently provide the output performance when the output performance is within a desired tolerance of the desired performance characteristic.
摘要翻译：提供了一种使用零引脚串行接口来控制集成电路的性能的方法。该方法包括识别电路的期望性能特征，以及在第一引脚上向第一引脚上的电路发送第一改变模式信号以使电路进入指令接收模式，其中第一引脚在正常操作模式期间执行不同的操作。该方法还包括当电路处于指令接收模式时，向第二引脚上的电路发送性能调整指令，第二引脚在正常操作模式期间执行不同的操作，并且向第二引脚上的电路发送第二改变模式信号第一个引脚使电路进入正常工作模式。将电路的输出性能与期望的性能特性进行比较，输出性能是正常操作模式期间电路的性能。当输出性能在期望的性能特性的期望公差内时，电路被设置为永久地提供输出性能。

2. 发明申请

US20120075006A1 ZERO PIN SERIAL INTERFACE 有权
公开(公告)号：US20120075006A1
公开(公告)日：2012-03-29
申请号：US13075617
申请日：2011-03-30
申请人： Hoa Vu , Ping Huang
发明人： Hoa Vu , Ping Huang
IPC分类号： H01H37/76
CPC分类号： G01R31/2884
摘要： A method for controlling performance of an integrated circuit using a zero-pin serial interface is provided. The method comprises identifying a desired performance characteristic of the circuit, and transmitting a first change mode signal to the circuit on a first pin to cause the circuit to enter an instruction reception mode, with the first pin performing differently during a normal operation mode. The method also comprises transmitting a performance adjusting instruction to the circuit on a second pin when the circuit is in the instruction reception mode, with the second pin performing differently during the normal operation mode, and transmitting a second change mode signal to the circuit on the first pin to cause the circuit to enter the normal operation mode. An output performance of the circuit is compared to the desired performance characteristic, with the output performance being the performance of the circuit during the normal operation mode. The circuit is set to permanently provide the output performance when the output performance is within a desired tolerance of the desired performance characteristic.
摘要翻译：提供了一种使用零引脚串行接口来控制集成电路的性能的方法。该方法包括识别电路的期望性能特征，以及在第一引脚上向第一引脚上的电路发送第一改变模式信号以使电路进入指令接收模式，其中第一引脚在正常操作模式期间执行不同的操作。该方法还包括当电路处于指令接收模式时，向第二引脚上的电路发送性能调整指令，其中第二引脚在正常操作模式期间执行不同的操作，并且向第二引脚上的电路发送第二改变模式信号第一个引脚使电路进入正常工作模式。将电路的输出性能与期望的性能特性进行比较，输出性能是正常操作模式期间电路的性能。当输出性能在期望的性能特性的期望公差内时，电路被设置为永久地提供输出性能。

3. 发明授权

US07221209B2 Precision floating gate reference temperature coefficient compensation circuit and method 有权
标题翻译：精密浮栅参考温度系数补偿电路及方法
公开(公告)号：US07221209B2
公开(公告)日：2007-05-22
申请号：US11129455
申请日：2005-05-12
申请人： Bhupendra K. Ahuja , Hoa Vu , Carlos Laber
发明人： Bhupendra K. Ahuja , Hoa Vu , Carlos Laber
IPC分类号： H01L35/00
CPC分类号： G05F3/30
摘要： A circuit and corresponding method for a precision floating gate voltage reference that uses a feedback loop, conduction of tunnel devices, and a bandgap cell to accurately program a desired charge level on a floating gate and provide a predictable and programmable temperature coefficient parameter for such voltage reference. In one embodiment, a bandgap cell is coupled through a capacitor to the floating gate storage node for providing a voltage source for canceling the temperature coefficient (TC) of the storage capacitor. The circuit and method enables TC to be minimized by either choosing the proper voltage source characteristics or alternatively, by choosing the proper ratio of two capacitors. The bandgap cell can alternatively be designed to have positive TC (PTAT voltage sources) or negative TC (VBE junction).
摘要翻译：一种用于精密浮动栅极电压基准的电路和相应方法，其使用反馈回路，隧道装置的导通以及带隙单元来精确地编程浮动栅极上的期望电荷电平，并为这种电压提供可预测和可编程的温度系数参数参考。在一个实施例中，带隙单元通过电容器耦合到浮动栅极存储节点，用于提供用于消除存储电容器的温度系数（TC）的电压源。电路和方法可以通过选择适当的电压源特性或者通过选择两个电容器的适当比例来最小化TC。可替代地，带隙单元可被设计为具有正的TC（PTAT电压源）或负的TC（VBE结）。

4. 再颁专利

USRE43236E1 Automatic circuit and method for temperature compensation of oscillator frequency variation over temperature for a real time clock chip 有权
标题翻译：用于实时时钟芯片的振荡器频率变化温度补偿的自动电路和方法
公开(公告)号：USRE43236E1
公开(公告)日：2012-03-13
申请号：US12779885
申请日：2010-05-13
申请人： Hoa Vu , Teck-Boon Serm , Bhupendra K. Ahuja
发明人： Hoa Vu , Teck-Boon Serm , Bhupendra K. Ahuja
IPC分类号： G04B17/20 , H03L1/00
CPC分类号： G04F5/06 , H03L1/02 , H03L1/022 , H03L1/027 , H03L1/028
摘要： An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal. A DSP engine receives the digital temperature signal and calculates frequency correction needed to correct for frequency inaccuracy and determines a bit sequence including the ATR bits appropriate to achieve the frequency correction.
摘要翻译：自动温度补偿实时时钟（RTC）芯片包括具有晶体振荡器模块的时钟部分，该晶体振荡器模块包括适于耦合到晶体的晶体补偿电路。晶体补偿电路包括包括多个负载电容器的非线性电容器DAC，其中负载电容器具有切换各个负载电容器的相应开关，以改变由振荡器模块产生的并联谐振频率（fp）。电容器DAC被布置成使得接收的模拟微调（ATR）位导致开关的布置，以提供总负载电容的非线性变化，从而导致fp与ATR位之间的线性关系。温度传感器模块耦合到晶体以测量至少晶体的温度。 A / D转换器耦合到温度传感器，用于输出代表晶体温度的数字温度信号。 DSP引擎接收数字温度信号并计算校正频率不准确所需的频率校正，并确定包括适合于实现频率校正的ATR位的比特序列。

5. 发明申请

US20080117722A1 AUTOMATIC CIRCUIT AND METHOD FOR TEMPERATURE COMPENSATION OF OSCILLATOR FREQUENCY VARIATION OVER TEMPERATURE FOR A REAL TIME CLOCK CHIP 有权
标题翻译：用于实时时钟芯片的振荡器频率变化温度补偿的自动电路和方法
公开(公告)号：US20080117722A1
公开(公告)日：2008-05-22
申请号：US11818387
申请日：2007-06-14
申请人： Bhupendra K. Ahuja , Hoa Vu , Teck-Boon Serm
发明人： Bhupendra K. Ahuja , Hoa Vu , Teck-Boon Serm
IPC分类号： G04G3/02 , G04G3/00 , G04G5/00
CPC分类号： G04F5/06 , H03L1/02 , H03L1/022 , H03L1/027 , H03L1/028
摘要： An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal. A DSP engine receives the digital temperature signal and calculates frequency correction needed to correct for frequency inaccuracy and determines a bit sequence including the ATR bits appropriate to achieve the frequency correction.
摘要翻译：自动温度补偿实时时钟（RTC）芯片包括具有晶体振荡器模块的时钟部分，该晶体振荡器模块包括适于耦合到晶体的晶体补偿电路。晶体补偿电路包括包括多个负载电容器的非线性电容器DAC，其中负载电容器具有切换各个负载电容器的相应开关，以改变由振荡器模块产生的并联谐振频率（fp）。电容器DAC被布置成使得接收的模拟微调（ATR）位导致开关的布置，以提供总负载电容的非线性变化，从而导致fp与ATR位之间的线性关系。温度传感器模块耦合到晶体以测量至少晶体的温度。 A / D转换器耦合到温度传感器，用于输出代表晶体温度的数字温度信号。 DSP引擎接收数字温度信号并计算校正频率不准确所需的频率校正，并确定包括适合于实现频率校正的ATR位的比特序列。

6. 发明申请

US20060255854A1 Precision floating gate reference temperature coefficient compensation circuit and method 有权
标题翻译：精密浮栅参考温度系数补偿电路及方法
公开(公告)号：US20060255854A1
公开(公告)日：2006-11-16
申请号：US11129455
申请日：2005-05-12
申请人： Bhupendra Ahuja , Hoa Vu , Carlos Laber
发明人： Bhupendra Ahuja , Hoa Vu , Carlos Laber
IPC分类号： G05F1/10
CPC分类号： G05F3/30
摘要： A circuit and corresponding method for a precision floating gate voltage reference that uses a feedback loop, conduction of tunnel devices, and a bandgap cell to accurately program a desired charge level on a floating gate and provide a predictable and programmable temperature coefficient parameter for such voltage reference. In one embodiment, a bandgap cell is coupled through a capacitor to the floating gate storage node for providing a voltage source for canceling the temperature coefficient (TC) of the storage capacitor. The circuit and method enables TC to be minimized by either choosing the proper voltage source characteristics or alternatively, by choosing the proper ratio of two capacitors. The bandgap cell can alternatively be designed to have positive TC (PTAT voltage sources) or negative TC (VBE junction).
摘要翻译：一种用于精密浮动栅极电压基准的电路和相应方法，其使用反馈回路，隧道装置的导通以及带隙单元来精确地编程浮动栅极上的期望电荷电平，并为这种电压提供可预测和可编程的温度系数参数参考。在一个实施例中，带隙单元通过电容器耦合到浮动栅极存储节点，用于提供用于消除存储电容器的温度系数（TC）的电压源。电路和方法可以通过选择适当的电压源特性或者通过选择两个电容器的适当比例来最小化TC。可替代地，带隙单元可被设计为具有正的TC（PTAT电压源）或负的TC（VBE结）。

7. 发明授权

US07371005B1 Automatic circuit and method for temperature compensation of oscillator frequency variation over temperature for a real time clock chip 有权
标题翻译：用于实时时钟芯片的振荡器频率变化温度补偿的自动电路和方法
公开(公告)号：US07371005B1
公开(公告)日：2008-05-13
申请号：US11818387
申请日：2007-06-14
申请人： Bhupendra K. Ahuja , Hoa Vu , Teck-Boon Serm
发明人： Bhupendra K. Ahuja , Hoa Vu , Teck-Boon Serm
IPC分类号： G04B17/20 , H03L1/00
CPC分类号： G04F5/06 , H03L1/02 , H03L1/022 , H03L1/027 , H03L1/028
摘要： An automatic temperature compensated real-time clock (RTC) chip includes a clock portion having a crystal oscillator block including crystal compensation circuitry adapted to be coupled to a crystal. The crystal compensation circuitry includes a non-linear capacitor DAC including a plurality of load capacitors, wherein the load capacitors have respective switches which switch respective ones of the load capacitors to change a parallel resonance frequency (fp) generated by the oscillator block. The capacitor DAC is arranged so that Analog Trimming (ATR) bits received cause an arrangement of the switches to provide a non-linear change in overall load capacitance to result in a linear relationship between fp and the ATR bits. A temperature sensor block is coupled to the crystal for measuring a temperature of at least the crystal. An A/D converter is coupled to the temperature sensor for outputting a digital temperature signal representative of the temperature of the crystal. A DSP engine receives the digital temperature signal and calculates frequency correction needed to correct for frequency inaccuracy and determines a bit sequence including the ATR bits appropriate to achieve the frequency correction.
摘要翻译：自动温度补偿实时时钟（RTC）芯片包括具有晶体振荡器模块的时钟部分，该晶体振荡器模块包括适于耦合到晶体的晶体补偿电路。晶体补偿电路包括包括多个负载电容器的非线性电容器DAC，其中负载电容器具有切换各个负载电容器的相应开关，以改变由振荡器模块产生的并联谐振频率（fp）。电容器DAC被布置成使得接收的模拟微调（ATR）位导致开关的布置，以提供总负载电容的非线性变化，从而导致fp与ATR位之间的线性关系。温度传感器模块耦合到晶体以测量至少晶体的温度。 A / D转换器耦合到温度传感器，用于输出代表晶体温度的数字温度信号。 DSP引擎接收数字温度信号并计算校正频率不准确所需的频率校正，并确定包括适合于实现频率校正的ATR位的比特序列。

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