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1. 发明授权

US08148811B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08148811B2
公开(公告)日：2012-04-03
申请号：US12438888
申请日：2007-08-22
申请人： Hiroyuki Shinogi , Katsuhiko Kitagawa , Kazuo Okada , Hiroshi Yamada
发明人： Hiroyuki Shinogi , Katsuhiko Kitagawa , Kazuo Okada , Hiroshi Yamada
IPC分类号： H01L23/12 , H01L31/0232
CPC分类号： H01L27/14618 , B81C1/00269 , H01L23/315 , H01L27/14625 , H01L27/14685 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/00
摘要： This invention is directed to offer a semiconductor device in which a cavity space is easily provided in a specific region when a supporting member is bonded to a semiconductor substrate through an adhesive layer, and its manufacturing method. A resist layer is applied to an entire top surface of the semiconductor substrate 2, and exposure to transfer a pattern is performed. By subsequent development and selective removal of the resist layer, the resist layer is formed into a shape of a plurality of columnar structures 4. Then, an adhesive material made of an epoxy resin or the like is applied to the entire top surface of the semiconductor substrate 2. The adhesive material is gathered around the columnar structures 4 by itself to form an adhesive layer 5. Therefore, in contrast, the adhesive layer 5 does not deposit in a region where the cavity is to be formed. Then, the supporting member 6 is bonded through the columnar structures 4 and the adhesive layer 5. By bonding the supporting member 6, there is formed the cavity 7 surrounded with the semiconductor substrate 2, the columnar structures 3 and the supporting member 6.
摘要翻译：本发明旨在提供一种半导体器件及其制造方法，其中当支撑构件通过粘合剂层结合到半导体衬底时，在特定区域中容易设置空腔。将抗蚀剂层施加到半导体衬底2的整个顶表面，并且进行曝光以转印图案。通过随后的抗蚀剂层的显影和选择性去除，将抗蚀剂层形成为多个柱状结构体4的形状。然后，将由环氧树脂等制成的粘合剂材料施加到半导体的整个顶表面基材2.粘合剂材料自身聚集在柱状结构4周围以形成粘合剂层5.因此，相反，粘合剂层5不会沉积在要形成空腔的区域中。然后，支撑部件6通过柱状结构体4和粘合剂层5接合。通过粘合支撑部件6，形成有被半导体基板2，柱状结构体3和支撑部件6包围的空腔7。

2. 发明授权

US07981807B2 Manufacturing method of semiconductor device with smoothing 有权
标题翻译：具有平滑功能的半导体器件的制造方法
公开(公告)号：US07981807B2
公开(公告)日：2011-07-19
申请号：US12051502
申请日：2008-03-19
申请人： Akira Suzuki , Takashi Noma , Hiroyuki Shinogi , Yukihiro Takao , Shinzo Ishibe , Shigeki Otsuka , Keiichi Yamaguchi
发明人： Akira Suzuki , Takashi Noma , Hiroyuki Shinogi , Yukihiro Takao , Shinzo Ishibe , Shigeki Otsuka , Keiichi Yamaguchi
IPC分类号： H01L21/302
CPC分类号： H01L21/78 , H01L23/3114 , H01L23/482 , H01L23/49827 , H01L2224/05001 , H01L2224/05023 , H01L2224/05568 , H01L2224/16 , H01L2224/274 , H01L2924/00014 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2224/05599 , H01L2224/05099
摘要： Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.
摘要翻译： CSP型半导体器件降低成本并提高可靠性。作为支撑板的玻璃基板通过粘合剂粘合到其上形成有第一布线的半导体晶片的第一表面。半导体晶片的厚度通过在与半导体晶片的第一表面相对的半导体晶片的第二表面上的背面研磨半导体晶片来减少。湿式蚀刻半导体晶片以去除在后研磨期间引起的半导体晶片的第二表面上的凸起和凹陷。然后蚀刻半导体晶片的第二表面以形成锥形槽。湿式蚀刻半导体晶片以减少由蚀刻引起的凸起和凹陷，并且绕着凹槽的一角。湿蚀刻提高了绝缘膜，布线和保护膜的覆盖率，并提高了半导体器件的产量和可靠性。

3. 发明申请

US20080277793A1 Semiconductor Device and Manufacturing Method Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080277793A1
公开(公告)日：2008-11-13
申请号：US12111383
申请日：2008-04-29
申请人： Takashi Noma , Hiroyuki Shinogi , Noboru Okubo
发明人： Takashi Noma , Hiroyuki Shinogi , Noboru Okubo
IPC分类号： H01L23/485 , H01L21/768 , H01L21/58
CPC分类号： H01L23/3114 , H01L21/6835 , H01L23/3185 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/94 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L27/14618 , H01L27/14683 , H01L2224/0401 , H01L2224/12105 , H01L2224/13022 , H01L2224/94 , H01L2224/97 , H01L2225/06586 , H01L2225/1035 , H01L2225/1058 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15313 , H01L2924/181 , H01L2924/3511 , H01L2224/11 , H01L2224/03 , H01L2924/00
摘要： A semiconductor device with improved moisture resistance and its manufacturing method as well as a manufacturing method of a semiconductor device which simplifies a manufacturing process and improves productivity are offered. This invention offers a CSP type semiconductor device and its manufacturing method that can prevent moisture and the like from infiltrating into it to attain high reliability by covering a side surface of a semiconductor chip with a thick protection layer. This invention also offers a highly productive manufacturing method of semiconductor devices by which a supporter bonded to semiconductor dice is etched from a back surface-side of the supporter so that the semiconductor devices can be separated without dicing.
摘要翻译：提供了一种具有改善的耐湿性的半导体器件及其制造方法以及简化制造工艺并提高生产率的半导体器件的制造方法。本发明提供一种CSP型半导体器件及其制造方法，其可以通过用厚保护层覆盖半导体芯片的侧表面来防止水分等渗入其中以获得高可靠性。本发明还提供了一种高效率的半导体器件的制造方法，通过该半导体器件，从支撑体的背面侧蚀刻与半导体晶片接合的支撑体，使得可以在不切割的情况下分离半导体器件。

4. 发明申请

US20080258258A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20080258258A1
公开(公告)日：2008-10-23
申请号：US12103857
申请日：2008-04-16
申请人： Katsu HORIKOSHI , Hisayoshi Uchiyama , Takashi Noma , Yoshinori Seki , Hiroshi Yamada , Shinzo Ishibe , Hiroyuki Shinogi
发明人： Katsu HORIKOSHI , Hisayoshi Uchiyama , Takashi Noma , Yoshinori Seki , Hiroshi Yamada , Shinzo Ishibe , Hiroyuki Shinogi
IPC分类号： H01L29/92
CPC分类号： H01L23/642 , H01L23/3114 , H01L23/481 , H01L23/5223 , H01L24/11 , H01L24/12 , H01L24/25 , H01L24/29 , H01L24/32 , H01L27/14618 , H01L27/14683 , H01L2224/02313 , H01L2224/0401 , H01L2224/0558 , H01L2224/05644 , H01L2224/1132 , H01L2224/131 , H01L2224/18 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3511 , H01L2924/3512 , H01L2224/13099 , H01L2924/00
摘要： The invention provides a semiconductor device which has a capacitor element therein to achieve size reduction of the device, the capacitor element having larger capacitance than conventional. A semiconductor integrated circuit and pad electrodes are formed on the front surface of a semiconductor substrate. A second insulation film is formed on the side and back surfaces of the semiconductor substrate, and a capacitor electrode is formed between the back surface of the semiconductor substrate and the second insulation film, contacting the back surface of the semiconductor substrate. The second insulation film is covered by wiring layers electrically connected to the pad electrodes, and the wiring layers and the capacitor electrode overlap with the second insulation film being interposed therebetween. Thus, the capacitor electrode, the second insulation film and the wiring layers form capacitors.
摘要翻译：本发明提供了一种半导体器件，其中具有电容器元件以实现器件的尺寸减小，电容器元件具有比常规更大的电容。半导体集成电路和焊盘电极形成在半导体衬底的前表面上。在半导体衬底的侧表面和后表面上形成第二绝缘膜，并且在半导体衬底的背面与第二绝缘膜之间形成电容电极，与半导体衬底的后表面接触。第二绝缘膜由与焊盘电极电连接的布线层覆盖，并且布线层和电容器电极与第二绝缘膜重叠。因此，电容器电极，第二绝缘膜和布线层形成电容器。

5. 发明申请

US20080224322A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080224322A1
公开(公告)日：2008-09-18
申请号：US12048861
申请日：2008-03-14
申请人： Hiroyuki SHINOGI
发明人： Hiroyuki SHINOGI
IPC分类号： H01L23/538 , H01L21/66
CPC分类号： H01L25/0657 , H01L22/10 , H01L23/3128 , H01L23/3135 , H01L23/481 , H01L24/16 , H01L24/90 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/90 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/06582 , H01L2924/00014 , H01L2924/01078 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： This invention is directed to offer a semiconductor device having a stacked layer structure and its manufacturing method that bring high yield and reliability. Semiconductor dice judged as good dice are stacked on a base substrate in which through holes and through hole electrodes are formed. Next, a protection layer to cover the semiconductor dice is formed. It is preferable that the protection layer is composed of a plurality of resin layers (a first resin layer and a second resin layer) that are different in hardness from each other. Then, a conductive terminal that is connected with the through hole electrode is formed on a back surface of the base substrate. Next, the second resin layer and the base substrate are cut along predetermined dicing lines and separated into individual semiconductor devices in chip form. As described above, a process step of separation into the semiconductor devices is performed while each of the semiconductor dice is mounted on the base substrate in wafer form.
摘要翻译：本发明旨在提供一种具有叠层结构的半导体器件及其制造方法，其具有高的产量和可靠性。判断为好的骰子的半导体骰子堆叠在形成有通孔和通孔电极的基底基板上。接下来，形成覆盖半导体晶片的保护层。优选保护层由硬度不同的多个树脂层（第一树脂层和第二树脂层）构成。然后，在基底基板的背面形成有与通孔电极连接的导电端子。接下来，沿着预定的切割线切割第二树脂层和基底基板，并以芯片形式分离成单独的半导体器件。如上所述，在将半导体晶片的每一个以晶片形式安装在基底基板上的同时，执行分离成半导体器件的处理步骤。

6. 发明申请

US20060270093A1 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US20060270093A1
公开(公告)日：2006-11-30
申请号：US11492044
申请日：2006-07-25
申请人： Takashi Noma , Akira Suzuki , Hiroyuki Shinogi
发明人： Takashi Noma , Akira Suzuki , Hiroyuki Shinogi
IPC分类号： H01L21/00
CPC分类号： H01L24/02 , H01L21/76898 , H01L23/3114 , H01L25/0657 , H01L27/14806 , H01L2224/0401 , H01L2224/16 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06565 , H01L2924/01005 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/00
摘要： A stacked MCM is manufactured at reduced cost without using expensive apparatus. A first wiring and a second wiring are formed on a surface of a semiconductor chip of a first semiconductor device through an insulation film. A glass substrate having an opening to expose the second wiring is bonded to the surface of the semiconductor chip on which the first wiring and the second wiring are formed. A third wiring is disposed on a back surface and a side surface of the semiconductor chip through an insulation film and connected to the first wiring. And a conductive terminal of another semiconductor device is connected to the second wiring through the opening.

7. 发明授权

US06555459B1 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06555459B1
公开(公告)日：2003-04-29
申请号：US09491033
申请日：2000-01-25
申请人： Ryoji Tokushige , Nobuyuki Takai , Hiroyuki Shinogi , Seiichi Ono
发明人： Ryoji Tokushige , Nobuyuki Takai , Hiroyuki Shinogi , Seiichi Ono
IPC分类号： H01L2100
CPC分类号： H01L24/12 , H01L23/3114 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/051 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05568 , H01L2224/05571 , H01L2224/05572 , H01L2224/05611 , H01L2224/05639 , H01L2224/11334 , H01L2224/1147 , H01L2224/13006 , H01L2224/13022 , H01L2224/13099 , H01L2924/0002 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2224/05552 , H01L2924/00014 , H01L2924/013 , H01L2924/01083
摘要： A metal post used with a chip size package and barrier metal formed on the metal post are omitted. After a second opening where a wiring layer is exposed is made, a second seed layer is formed and a solder post 7 is formed with the seed layer as a plate electrode.
摘要翻译：省略了在金属柱上形成的具有芯片尺寸封装和阻挡金属的金属柱。在布线层暴露的第二开口之后，形成第二种子层，并且形成具有种子层作为平板电极的焊料柱7。

8. 发明授权

US09034729B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09034729B2
公开(公告)日：2015-05-19
申请号：US12438869
申请日：2007-08-22
申请人： Hiroshi Yamada , Katsuhiko Kitagawa , Kazuo Okada , Yuichi Morita , Hiroyuki Shinogi , Shinzo Ishibe , Yoshinori Seki , Takashi Noma
发明人： Hiroshi Yamada , Katsuhiko Kitagawa , Kazuo Okada , Yuichi Morita , Hiroyuki Shinogi , Shinzo Ishibe , Yoshinori Seki , Takashi Noma
IPC分类号： H01L21/30 , H01L27/146 , B81C1/00
CPC分类号： H01L27/14618 , B81C1/00269 , B81C2203/0118 , H01L27/14625 , H01L27/14683 , H01L27/14685 , H01L2224/05001 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05548 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/13 , H01L2224/13025 , H01L2924/00014
摘要： An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced and a method of manufacturing the same. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A first supporting body 5 having a penetration hole 6 penetrating it from the front surface to the back surface is attached to a front surface of a semiconductor substrate 2 with an adhesive layer 4 being interposed therebetween. A device element 1 and wiring layers 3 are formed on the front surface of the semiconductor substrate 2. A second supporting body 7 is attached to the first supporting body 5 with an adhesive layer 8 being interposed therebetween so as to cover the penetration hole 6. The device element 1 is sealed in a cavity 9 surrounded by the semiconductor substrate 2, the first supporting body 5 and the second supporting body 7.
摘要翻译：本发明的目的是提供一种较小的半导体器件，其制造工艺简化并且制造成本降低，并且制造该半导体器件的方法。此外，本发明的目的是提供一种具有空腔的半导体器件。具有穿透孔6的从前表面到后表面穿透的第一支撑体5被粘附在半导体衬底2的前表面上，其间插入有粘合剂层4。器件元件1和布线层3形成在半导体衬底2的前表面上。第二支撑体7被安装在第一支撑体5上，其中夹有粘合剂层8以覆盖穿透孔6。器件元件1被密封在由半导体衬底2，第一支撑体5和第二支撑体7包围的空腔9中。

9. 发明授权

US08373278B2 Semiconductor device having stacked dice disposed on base substrate 有权
标题翻译：半导体器件具有设置在基底基板上的堆叠的骰子
公开(公告)号：US08373278B2
公开(公告)日：2013-02-12
申请号：US12048861
申请日：2008-03-14
申请人： Hiroyuki Shinogi
发明人： Hiroyuki Shinogi
IPC分类号： H01L23/48
CPC分类号： H01L25/0657 , H01L22/10 , H01L23/3128 , H01L23/3135 , H01L23/481 , H01L24/16 , H01L24/90 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/90 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/06582 , H01L2924/00014 , H01L2924/01078 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： Semiconductor dice judged as good dice are stacked on a base substrate in which through holes and through hole electrodes are formed. Next, a protection layer to cover the semiconductor dice is formed. It is preferable that the protection layer is composed of a plurality of resin layers (a first resin layer and a second resin layer) that are different, in hardness from each other. Then, a conductive terminal that is connected with the through hole electrode is formed on a back surface of the base substrate. Next, the second resin layer and the base substrate are cut along predetermined dicing lines and separated into individual semiconductor devices in chip form. A process step of separation into the semiconductor devices is performed while each of the semiconductor dice is mounted on the base substrate in wafer form.
摘要翻译：判断为好的骰子的半导体骰子堆叠在形成有通孔和通孔电极的基底基板上。接下来，形成覆盖半导体晶片的保护层。保护层优选由彼此硬度不同的多个树脂层（第一树脂层和第二树脂层）构成。然后，在基底基板的背面形成有与通孔电极连接的导电端子。接下来，沿着预定的切割线切割第二树脂层和基底基板，并以芯片形式分离成单独的半导体器件。在半导体芯片中的每一个以晶片形式安装在基底基板上的同时执行分离到半导体器件中的处理步骤。

10. 发明申请

US20090321903A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090321903A1
公开(公告)日：2009-12-31
申请号：US12438888
申请日：2007-08-22
申请人： Hiroyuki Shinogi , Katsuhiko Kitagawa , Kazuo Okada , Hiroshi Yamada
发明人： Hiroyuki Shinogi , Katsuhiko Kitagawa , Kazuo Okada , Hiroshi Yamada
IPC分类号： H01L23/02 , H01L21/50
CPC分类号： H01L27/14618 , B81C1/00269 , H01L23/315 , H01L27/14625 , H01L27/14685 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/00
摘要： This invention is directed to offer a semiconductor device in which a cavity space is easily provided in a specific region when a supporting member is bonded to a semiconductor substrate through an adhesive layer, and its manufacturing method. A resist layer is applied to an entire top surface of the semiconductor substrate 2, and exposure to transfer a pattern is performed. By subsequent development and selective removal of the resist layer, the resist layer is formed into a shape of a plurality of columnar structures 4. Then, an adhesive material made of an epoxy resin or the like is applied to the entire top surface of the semiconductor substrate 2. The adhesive material is gathered around the columnar structures 4 by itself to form an adhesive layer 5. Therefore, in contrast, the adhesive layer 5 does not deposit in a region where the cavity is to be formed. Then, the supporting member 6 is bonded through the columnar structures 4 and the adhesive layer 5. By bonding the supporting member 6, there is formed the cavity 7 surrounded with the semiconductor substrate 2, the columnar structures 3 and the supporting member 6.
摘要翻译：本发明旨在提供一种半导体器件及其制造方法，其中当支撑构件通过粘合剂层结合到半导体衬底时，在特定区域中容易设置空腔。将抗蚀剂层施加到半导体衬底2的整个顶表面，并且进行曝光以转印图案。通过随后的抗蚀剂层的显影和选择性去除，将抗蚀剂层形成为多个柱状结构体4的形状。然后，将由环氧树脂等制成的粘合剂材料施加到半导体的整个顶表面基材2.粘合剂材料自身聚集在柱状结构4周围以形成粘合剂层5.因此，相反，粘合剂层5不会沉积在要形成空腔的区域中。然后，支撑部件6通过柱状结构体4和粘合剂层5接合。通过粘合支撑部件6，形成有被半导体基板2，柱状结构体3和支撑部件6包围的空腔7。

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