专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06973225B2 Techniques for attaching rotated photonic devices to an optical sub-assembly in an optoelectronic package 有权
标题翻译：用于将旋转的光子器件附接到光电子封装中的光学子组件的技术
公开(公告)号：US06973225B2
公开(公告)日：2005-12-06
申请号：US10165548
申请日：2002-06-06
申请人： Luu Thanh Nguyen , Ken Pham , Peter Deane , William Paul Mazotti , Bruce Carlton Roberts , Hau Thanh Nguyen , John P. Briant , Roger Clarke , Michael R. Nelson , Janet E. Townsend
发明人： Luu Thanh Nguyen , Ken Pham , Peter Deane , William Paul Mazotti , Bruce Carlton Roberts , Hau Thanh Nguyen , John P. Briant , Roger Clarke , Michael R. Nelson , Janet E. Townsend
IPC分类号： H01L27/144 , H01L31/0203 , H01L31/18 , G02B6/12
CPC分类号： H01L27/144 , H01L31/0203 , H01L31/18 , H01L2224/48091 , H01L2224/48247 , H01L2224/73207 , H01L2924/01322 , H01L2924/07811 , H01L2924/10253 , H01L2924/00014 , H01L2924/00
摘要： The techniques of the present invention are directed towards setting a photonic device into a groove of a substrate, which is then attached to the chip sub-assembly in a way that the resulting optoelectronic package has a low profile and the interconnects between the photonic device and the semiconductor chip are short. The technique involves partially etching a groove in a substrate to allow for positioning of a photonic device within the groove. The photonic device is connected to the chip sub-assembly through interconnects that extend through the thickness of the substrate. The photonic devices are placed on their sides so that the active facets are perpendicular to the main axis of the chip sub-assembly. In this configuration, the optical fibers can be positioned parallel to the CSA top surface, ensuring a low module profile in the process.
摘要翻译：本发明的技术旨在将光子器件设置到衬底的凹槽中，然后将其附接到芯片子组件，使得所得光电封装具有低轮廓，并且光子器件和半导体芯片很短。该技术涉及部分蚀刻衬底中的凹槽以允许将光子器件定位在凹槽内。光子器件通过延伸穿过衬底厚度的互连连接到芯片子组件。光子器件放置在它们的侧面上，使得有源刻面垂直于芯片子组件的主轴线。在这种配置中，光纤可以平行于CSA顶面定位，从而确保了该过程中的低模块轮廓。

2. 发明授权

US07510908B1 Method to dispense light blocking material for wafer level CSP 有权
标题翻译：分配晶圆级CSP的阻光材料的方法
公开(公告)号：US07510908B1
公开(公告)日：2009-03-31
申请号：US11050267
申请日：2005-02-01
申请人： Hau Thanh Nguyen , Nikhil Kelkar
发明人： Hau Thanh Nguyen , Nikhil Kelkar
IPC分类号： H01L21/00
CPC分类号： H01L21/56 , H01L23/3114 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a packaged semiconductor device. The device includes a die with an active surface having a plurality of electrical contacts, a back surface located opposite the active surface, and a plurality of side surfaces. The device also includes a first light blocking protective coating that covers at least a portion of the side surfaces of the die. Also, disclosed is a semiconductor wafer including an active surface and a back surface, the active surface having a multiplicity of electrical contacts. The wafer includes a plurality of channels formed in the active surface of the wafer, the channels being arranged in a grid that effectively divide the wafer into a plurality of dice, each die having a plurality of the electrical contacts; and a light blocking filler material that fills the channels. Further, disclosed is a stamp suitable for applying a light blocking filler material into grooves on a semiconductor wafer. The stamp includes a base plate; and a multiplicity of spaced apart fins arranged in a matrix of lines that define a grid sized to match the spacing of saw streets in an associated semiconductor wafer, each line of the matrix having a series of spaced apart fins. Next, disclosed is a wafer level method of packaging integrated circuits. The wafer level method includes cutting a matrix of channels in a semiconductor wafer; dispensing a light blocking filler material into the channels; and dicing the semiconductor wafer by cutting the wafer along the channels and through the light blocking filler material, wherein the dicing cuts are narrower than the channels such that some of the light blocking filler material covers at least portions of side walls of the dice that are singulated by the dicing operation.
摘要翻译：公开了一种封装的半导体器件。该装置包括具有多个电触点的活动表面的模具，与该活动表面相对的后表面和多个侧表面。该装置还包括覆盖模具的侧表面的至少一部分的第一遮光保护涂层。此外，公开了包括有源表面和背面的半导体晶片，该有源表面具有多个电触点。晶片包括形成在晶片的有源表面中的多个通道，通道布置成格栅，其有效地将晶片分成多个裸片，每个芯片具有多个电触点; 以及填充通道的遮光填充材料。此外，公开了适用于将遮光填充材料施加到半导体晶片上的凹槽中的印模。邮票包括底板; 以及多个间隔开的散热片，其布置成线的矩阵，其限定了尺寸以匹配相关联的半导体晶片中的锯道的间隔的格栅，矩阵的每一行具有一系列间隔开的散热片。接下来，公开了封装集成电路的晶片级方法。晶片级方法包括切割半导体晶片中的通道矩阵; 将光阻挡填料分配到通道中; 以及通过沿着通道切割晶片并通过遮光填充材料来切割半导体晶片，其中切割切口比通道窄，使得一些遮光填充材料覆盖骰子的侧壁的至少部分由切割操作分割。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式