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1. 发明授权

US09700464B2 Absorbent article 有权
公开(公告)号：US09700464B2
公开(公告)日：2017-07-11
申请号：US13988381
申请日：2011-11-14
申请人： Haruki Toda , Kaiyou Nakajima
发明人： Haruki Toda , Kaiyou Nakajima
IPC分类号： A61F13/15 , A61F13/51 , A61F13/494 , A61F13/495 , A61F13/537 , A61F13/539 , A61F13/532 , A61F13/533 , A61F13/53 , A61F13/84
CPC分类号： A61F13/51 , A61F13/4942 , A61F13/4946 , A61F13/49473 , A61F13/495 , A61F13/532 , A61F13/5323 , A61F13/533 , A61F13/53717 , A61F13/53747 , A61F13/539 , A61F2013/530554 , A61F2013/530562 , A61F2013/530868 , A61F2013/8497
摘要： An absorbent article which has in a longitudinal direction from the front side to the rear side a front waist region, a rear waist region and a crotch region located between the front and rear waist regions. An absorbent sheet is provided between a topsheet and a second sheet which includes at least one liquid-pervious sheet having sandwiched therein an absorbent polymer that is present between a topsheet and a second sheet. The second sheet has a higher liquid diffusibility than the topsheet, the topsheet, a backsheet, an absorption body and the second sheet are disposed across the front waist region, the crotch region and the rear waist region, and the absorbent sheet is disposed in at least a part of the rear waist region.

2. 发明授权

US09245621B2 Semiconductor memory device executing a write operation with first and second voltage applications 有权
标题翻译：半导体存储器件利用第一和第二电压应用执行写操作
公开(公告)号：US09245621B2
公开(公告)日：2016-01-26
申请号：US14118703
申请日：2012-03-09
申请人： Jun Deguchi , Haruki Toda
发明人： Jun Deguchi , Haruki Toda
IPC分类号： G11C11/00 , G11C13/00
CPC分类号： G11C13/0069 , G11C13/0002 , G11C13/0007 , G11C2013/0073 , G11C2013/0085 , G11C2013/0088 , G11C2013/009 , G11C2213/71 , G11C2213/77
摘要： A semiconductor memory device comprises a memory cell array including plural memory cells provided at the intersections of plural first lines and plural second lines; and a write circuit. The write circuit, on execution of a write operation, executes a first step of applying a voltage across the first and second lines connected to a data-write-targeted, selected memory cell, and a different voltage across the first and second lines connected to a data-write-untargeted, unselected memory cell of the plural memory cells and, after execution of the first step, executes a second step of applying a voltage, required for data write, across the first and second lines connected to the selected memory cell, and bringing at least one of the first and second lines connected to the unselected memory cell into the floating state.
摘要翻译：半导体存储器件包括存储单元阵列，该存储单元阵列包括设置在多个第一线和多条第二线的交点处的多个存储单元; 和写电路。写入电路在执行写入操作时执行第一步骤，跨连接到数据写入目标的选择的存储器单元的第一和第二线路施加电压，并跨越连接到第一和第二线路的不同电压所述多个存储单元的数据写未指定的未选择的存储单元，并且在执行所述第一步骤之后，执行第二步骤，在连接到所选存储单元的第一和第二行上施加数据写入所需的电压并且将连接到未选择的存储单元的第一和第二线中的至少一个引入浮动状态。

3. 发明授权

US09035127B2 Absorbent article 有权
标题翻译：吸收制品
公开(公告)号：US09035127B2
公开(公告)日：2015-05-19
申请号：US13824500
申请日：2011-11-14
申请人： Kaiyo Nakajima , Haruki Toda
发明人： Kaiyo Nakajima , Haruki Toda
IPC分类号： A61F13/15 , A61F13/537 , A61F13/494 , A61F13/535 , A61F13/53
CPC分类号： A61F13/53747 , A61F13/49426 , A61F13/5323 , A61F13/535 , A61F2013/530525 , A61F2013/530532 , A61F2013/530554 , A61F2013/530562 , A61F2013/5355 , A61F2013/53795
摘要： An absorbent article ensuring that even when excreted urine diffuses by running down the wearer's skin, the urine is prevented from leaking out of the absorbent article. The absorbent article comprises an absorbent sheet that has at least one absorbent polymer-existing region in which the absorbent polymer is sandwiched by at least one liquid-pervious sheet and at least one absorbent polymer-nonexisting region which is free of absorbent polymer. The at least a part of the absorbent sheet is disposed in a rear waist region, and a planar shape of the absorbent polymer-existing region disposed on the rear waist region side of the longitudinal center of the crotch region of the absorbent sheet is a nearly V-shaped with an apex facing in the direction from the front waist region to the rear waist region in the longitudinal direction of the absorbent article.
摘要翻译：一种吸收性物品，其确保即使排泄的尿液通过使穿着者的皮肤下降而扩散，也能防止尿液从吸收性物品中泄漏出来。吸收性物品包括具有吸收性聚合物存在区域的至少一个吸收性聚合物存在区域的吸收性片材，其中吸收性聚合物被至少一种透液性片材和至少一种不含吸收性聚合物的吸收性聚合物非存在区域夹持。吸收性片材的至少一部分配置在后腰围区域，吸收性聚合物存在区域的平面形状设置在吸收性片材的裆下区域的纵向中心的后腰围区域侧为近 V形，其顶点在吸收性物品的纵向方向上从前腰区到后腰区的方向。

4. 发明申请

US20130245589A1 ABSORBENT ARTICLE 有权
标题翻译：吸收品
公开(公告)号：US20130245589A1
公开(公告)日：2013-09-19
申请号：US13988381
申请日：2011-11-14
申请人： Haruki Toda , Kaiyou Nakajima
发明人： Haruki Toda , Kaiyou Nakajima
IPC分类号： A61F13/51
CPC分类号： A61F13/51 , A61F13/4942 , A61F13/4946 , A61F13/49473 , A61F13/495 , A61F13/532 , A61F13/5323 , A61F13/533 , A61F13/53717 , A61F13/53747 , A61F13/539 , A61F2013/530554 , A61F2013/530562 , A61F2013/530868 , A61F2013/8497
摘要： An absorbent article which has in a longitudinal direction from the front side to the rear side a front waist region, a rear waist region and a crotch region located between the front and rear waist regions. An absorbent sheet is provided between a topsheet and a second sheet which includes at least one liquid-pervious sheet having sandwiched therein an absorbent polymer that is present between a topsheet and a second sheet. The second sheet has a higher liquid diffusibility than the topsheet, the topsheet, a backsheet, an absorption body and the second sheet are disposed across the front waist region, the crotch region and the rear waist region, and the absorbent sheet is disposed in at least a part of the rear waist region.
摘要翻译：一种吸收性物品，其从前侧到后侧的纵向方向具有前腰围区域，后腰围区域和位于前腰围区域和后腰围区域之间的裆部区域。吸收性片材设置在顶片和第二片材之间，该片材包括至少一个透液性片材，其中夹有存在于顶片和第二片材之间的吸收性聚合物。第二片材具有比顶片更高的液体扩散性，顶片，底片，吸收体和第二片材横跨前腰围区域，裆下区域和后腰围区域设置，并且吸收片材设置在至少部分后腰区域。

5. 发明申请

US20130237941A1 ABSORBENT ARTICLE 有权
标题翻译：吸收品
公开(公告)号：US20130237941A1
公开(公告)日：2013-09-12
申请号：US13824497
申请日：2011-11-14
申请人： Kaiyo Nakajima , Haruki Toda
发明人： Kaiyo Nakajima , Haruki Toda
IPC分类号： A61F13/537
CPC分类号： A61F13/537 , A61F13/495 , A61F13/535 , A61F2013/4953 , A61F2013/4956 , A61F2013/4958
摘要： An absorbent article configured to ensure that even when the excreted urine diffuses by running down the wearer's skin, the skin is prevented from remaining wetted. In the absorbent article of the present invention, when an artificial urine is dropped and absorbed in the urination region of the crotch region, where an absorbent sheet is not disposed, the return amount of the artificial urine in the buttock region of the rear waist region, where an absorbent sheet is disposed, takes a value of 200 times less than the return amount of the artificial urine in the urination region; and the return amount of the artificial urine in the buttock region when the artificial urine is dropped and absorbed in the buttock region takes a value of 0.7 or less of the return amount of the artificial urine in the urination region when the artificial urine is dropped and absorbed in the urination region.
摘要翻译：一种被配置为确保即使当排泄的尿通过穿过穿着者的皮肤而扩散的吸收制品时，防止皮肤保持润湿。在本发明的吸收性物品中，在不设置吸收性片材的裆下区域的排尿区域中人造尿液滴下吸收时，后腰围区域的臀部区域中的人造尿液的返回量其中设置有吸收性片材，其比排尿区域中的人造尿液的返回量小200倍; 并且当人造尿在臀部区域下落并吸收时，臀部区域中的人造尿液的返回量在人造尿液滴下时排尿区域中的人造尿液的返回量的值为0.7以下，吸收在排尿区域。

6. 发明授权

US08413013B2 Memory system 有权
标题翻译：内存系统
公开(公告)号：US08413013B2
公开(公告)日：2013-04-02
申请号：US12359555
申请日：2009-01-26
申请人： Haruki Toda
发明人： Haruki Toda
IPC分类号： G11C29/00
CPC分类号： G06F11/1048
摘要： A memory system including: a memory device; an ECC system installed in the memory device so as to generate a warning signal in case there are uncorrectable errors; an address generating circuit for generating internal addresses in place of bad area addresses in accordance with the waning signal, the progressing of the internal addresses being selected as to avoid address collision with the address progressing of the memory device at least at the beginning; and a CAM for storing the internal addresses as substitutive area addresses, the CAM being referred to at an access time of the memory device so as to generate the substitutive area addresses in place of the bad area addresses in accordance with the warning signal.
摘要翻译：一种存储器系统，包括：存储器件; 安装在存储装置中的ECC系统，以便在存在不可纠正的错误的情况下产生警告信号; 地址产生电路，用于根据所述减弱信号产生代替不良区域地址的内部地址，所述内部地址的进行至少在开始时被选择为避免与所述存储器件的地址进行地址冲突; 以及用于存储作为替代区域地址的内部地址的CAM，在存储器件的访问时间处参考CAM，以便根据警告信号产生替代区域地址来代替不良区域地址。

7. 发明申请

US20120294075A1 PHASE-CHANGE MEMORY DEVICE 有权
标题翻译：相变存储器件
公开(公告)号：US20120294075A1
公开(公告)日：2012-11-22
申请号：US13561822
申请日：2012-07-30
申请人： Haruki TODA
发明人： Haruki TODA
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/003 , G11C13/004 , G11C2013/0054 , G11C2013/009 , G11C2213/71 , G11C2213/72 , G11C2213/78 , G11C2213/79 , H01L27/2409 , H01L27/2472 , H01L27/2481 , H01L45/06 , H01L45/1233
摘要： A phase-change memory device has a plurality of first wiring lines WL extending in parallel to each other, a plurality of second wiring lines BL which are disposed to cross the first wiring lines WL while being separated or isolated therefrom, and memory cells MC which are disposed at respective cross points of the first wiring lines WL and the second wiring lines BL and each of which has one end connected to a first wiring line WL and the other end connected to a second wiring line BL. The memory cell MC has a variable resistive element VR which stores as information a resistance value determined due to phase change between crystalline and amorphous states thereof, and a Schottky diode SD which is connected in series to the variable resistive element VR.
摘要翻译：相变存储器件具有彼此平行延伸的多个第一布线WL，多个第二布线BL布置成与第一布线WL交叉而被分离或隔离，并且存储单元MC 被布置在第一布线WL和第二布线BL的各交叉点，并且每个布线的一端连接到第一布线WL，另一端连接到第二布线BL。存储单元MC具有可变电阻元件VR，其存储由于其结晶态和非晶态之间的相变而确定的电阻值和与可变电阻元件VR串联连接的肖特基二极管SD的信息。

8. 发明授权

US08259489B2 Nonvolatile semiconductor memory device generating different write pulses to vary resistances 有权
标题翻译：产生不同写入脉冲以改变电阻的非易失性半导体存储器件
公开(公告)号：US08259489B2
公开(公告)日：2012-09-04
申请号：US12677017
申请日：2008-09-09
申请人： Hiroyuki Nagashima , Hirofumi Inoue , Haruki Toda
发明人： Hiroyuki Nagashima , Hirofumi Inoue , Haruki Toda
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C11/5685 , G11C13/0004 , G11C13/0009 , G11C13/004 , G11C13/0064 , G11C2013/0054 , G11C2013/0073 , G11C2213/56 , G11C2213/71 , G11C2213/72
摘要： A nonvolatile semiconductor memory device comprises a memory cell array of electrically erasable programmable nonvolatile memory cells arranged in matrix, each memory cell using a variable resistor. A pulse generator is operative to generate plural types of write pulses for varying the resistance of the variable resistor in three or more stages based on ternary or higher write data. A selection circuit is operative to select a write target memory cell from the memory cell array based on a write address and supply the write pulse generated from the pulse generator to the selected memory cell.
摘要翻译：非易失性半导体存储器件包括以矩阵形式布置的电可擦除可编程非易失性存储单元的存储单元阵列，每个存储单元使用可变电阻器。脉冲发生器用于产生多种类型的写入脉冲，用于基于三进制或更高写入数据在三个或更多个阶段中改变可变电阻器的电阻。选择电路可操作以基于写地址从存储单元阵列中选择写入目标存储单元，并将从脉冲发生器产生的写入脉冲提供给所选存储单元。

9. 发明授权

US08243493B2 Resistance change memory device 有权
标题翻译：电阻变化记忆装置
公开(公告)号：US08243493B2
公开(公告)日：2012-08-14
申请号：US12128343
申请日：2008-05-28
申请人： Haruki Toda
发明人： Haruki Toda
IPC分类号： G11C11/00
CPC分类号： G11C13/00 , G11C13/0023 , G11C13/0026 , G11C13/004 , G11C2013/0054 , G11C2213/71 , G11C2213/72
摘要： A resistance change memory device includes: a semiconductor substrate; a cell array so formed on the substrate as to have resistance-change memory cells three-dimensionally stacked and arranged; and a sense amplifier array formed on the substrate under the cell array, wherein the cell array includes first and second cell array blocks arranged in a bit line direction, and first and second bit lines are selected from the first and second cell array blocks, respectively, to constitute a pair and coupled to differential input nodes in the sense amplifier array.
摘要翻译：电阻变化存储器件包括：半导体衬底; 在基板上形成为具有三维层叠并配置的电阻变化存储单元的单元阵列; 以及形成在所述单元阵列下方的所述基板上的读出放大器阵列，其中，所述单元阵列包括以位线方向排列的第一和第二单元阵列块，并且分别从所述第一和第二单元阵列块中选择第一和第二位线，以构成一对并耦合到读出放大器阵列中的差分输入节点。

10. 发明授权

US08184470B2 Resistance change memory device and programming method thereof 失效
标题翻译：电阻变化记忆体及其编程方法
公开(公告)号：US08184470B2
公开(公告)日：2012-05-22
申请号：US12668750
申请日：2008-06-25
申请人： Haruki Toda , Hiroto Nakai
发明人： Haruki Toda , Hiroto Nakai
IPC分类号： G11C11/00
CPC分类号： G11C11/5685 , G11C13/0007 , G11C13/0061 , G11C13/0064 , G11C13/0069 , G11C2013/009 , G11C2013/0092 , G11C2213/31 , G11C2213/32
摘要： A method of programming a resistance change memory device includes: applying program voltage pulses to a memory cell for programming a target resistance value; setting thermal relaxation times between the respective program voltage pulses; and controlling the shape of each the program voltage pulse in accordance with the present cell's resistance value determined by the preceding program voltage pulse application.
摘要翻译：一种对电阻变化存储器件进行编程的方法包括：将程序电压脉冲施加到存储器单元以编程目标电阻值; 设置各个编程电压脉冲之间的热弛豫时间; 并且根据由先前的编程电压脉冲应用确定的当前单元的电阻值来控制每个编程电压脉冲的形状。

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