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1. 发明授权

US4472875A Method for manufacturing an integrated circuit device 失效
标题翻译：集成电路装置的制造方法
公开(公告)号：US4472875A
公开(公告)日：1984-09-25
申请号：US508316
申请日：1983-06-27
申请人： Raymond R. Christian , Harry Sue , Joseph C. Zuercher
发明人： Raymond R. Christian , Harry Sue , Joseph C. Zuercher
IPC分类号： B41J2/34 , B41J2/355 , H01L21/02 , H01L21/301 , H01L21/52 , H01L21/58 , H01L21/822 , H01L23/14 , H01L27/04 , H01L27/12 , H01L21/78 , H01L21/95
CPC分类号： B41J2/355 , Y10S438/975
摘要： A method for manufacturing an integrated circuit thermal print head is illustrated including transistor 20 and a resistor doped region 22 formed on a first surface of a silicon circuit wafer 10. A contamination barrier in the form of a moat 26 filled with silicon nitride 30 is formed around the transistor 20. A support wafer 50 is secured to the first surface of the circuit wafer 10 by an adhesive layer 58. The circuit wafer 10 is thinned, and the exposed surface of the circuit wafer 10 is photoshaped to define wafer segments 68 positioned over the resistor doped region 22.
摘要翻译：示出了制造集成电路热敏打印头的方法，其包括晶体管20和形成在硅电路晶片10的第一表面上的电阻器掺杂区22.形成填充有氮化硅30的护城河26形式的污染阻挡层支撑晶片50通过粘合剂层58固定到电路晶片10的第一表面。电路晶片10变薄，并且电路晶片10的暴露表面被成形以限定定位的晶片段68 在电阻掺杂区22上。

2. 发明授权

US4045310A Starting product for the production of a read-only memory and a method of producing it and the read-only memory 失效
标题翻译：用于生产只读存储器的起始产品及其制造方法和只读存储器
公开(公告)号：US4045310A
公开(公告)日：1977-08-30
申请号：US682411
申请日：1976-05-03
申请人： Robert K. Jones , Harry Sue
发明人： Robert K. Jones , Harry Sue
IPC分类号： G11C17/16 , H01L21/3213 , H01L21/768 , H01L23/525 , C25F3/00 , C25F3/14
CPC分类号： H01L21/76888 , G11C17/16 , H01L21/32134 , H01L23/5256 , H01L2924/0002 , H01L2924/3011
摘要： A read-only memory is manufactured from a matrix or array of multilayer electrical devices, each of which includes at least one metallic layer, a portion of which contacts a doped semi conductor region. The metallic layers are controllably and rapidly thinned down and decreased in cross-sectional area in the vicinity of the doped regions to form fusible links, thus producing a ROM starting product. Fusible link formation is enhanced by the use of an etchant for the metallic layer which forms an electrochemical cell in conjunction therewith and with the semiconductor and the doped region. Any metallic layers not contacting a doped region are also etched by the etchant, but at the much slower "chemical rate". Following the production of the starting product, a ROM may be produced by the selective application of voltages to selected fusible links, the I.sup.2 R heating of the links fusing them, or blowing them out. In a preferred embodiment, the electrical devices are MOSFETS.
摘要翻译：只读存储器由多层电气器件的矩阵或阵列制造，每个多层电气器件包括至少一个金属层，其一部分接触掺杂的半导体区域。金属层在掺杂区域附近的横截面积可控地迅速变薄并减小，形成易熔链，从而产生ROM起始产品。通过使用形成与其结合的电化学电池的金属层和与半导体和掺杂区域的蚀刻剂来增强可熔性链节形成。任何不接触掺杂区域的金属层也被蚀刻剂蚀刻，但是在“化学速率”下慢得多。在生产起始产品之后，可以通过选择性地向选定的可熔链路施加电压，将熔断它们的链路的I2R加热或将它们吹出来来产生ROM。在优选实施例中，电气装置是MOSFET。

3. 发明授权

US4485553A Method for manufacturing an integrated circuit device 失效
标题翻译：集成电路装置的制造方法
公开(公告)号：US4485553A
公开(公告)日：1984-12-04
申请号：US508314
申请日：1983-06-27
申请人： Raymond R. Christian , Harry Sue , Herbert A. Waggener , Joseph C. Zuercher
发明人： Raymond R. Christian , Harry Sue , Herbert A. Waggener , Joseph C. Zuercher
IPC分类号： H01L21/02 , H01L21/301 , H01L21/304 , H01L21/48 , H01L21/52 , H01L21/58 , H01L21/60 , H01L21/78 , H01L21/822 , H01L23/14 , H01L23/482 , H01L27/04 , H01L27/12 , H01L21/95
CPC分类号： H01L21/78 , H01L21/4803 , H01L21/76897 , H01L23/147 , H01L23/4825 , H01L24/11 , H01L24/33 , H01L24/83 , H01L2224/13099 , H01L2224/8319 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , Y10S438/975
摘要： An integrated circuit 14 having an active circuit 19 is formed on a circuit wafer 10. A moat 18 in the field oxide 20 surrounds the active circuit 19. Metallic conductor 30 passes from a location on the active circuit 19 over the moat 18 to a contact area 22. The wafer 10 is covered with a photoshaped silicon nitride layer 18, and a support wafer 40 is secured with adhesive 46 to the circuit side of the circuit wafer 10. The circuit wafer 10 is photoshaped to expose the metallic conductor 30 at the contact area 22, and the contact area 22 is prepared with multiple metal layers 62, 66, 70 for connection to external wiring.
摘要翻译：具有有源电路19的集成电路14形成在电路晶片10上。场氧化物20中的护城河18围绕有源电路19.金属导体30从护套18上的有源电路19上的位置通过触点晶片10被光电氮化硅层18覆盖，并且用粘合剂46将支撑晶片40固定到电路晶片10的电路侧。电路晶片10被成形为在金属导体30处露出金属导体30 接触区域22和接触区域22制备有用于连接到外部布线的多个金属层62,66,70。

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