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    • 3. 发明授权
    • Method and apparatus for establishing threshold level in a binary mode
document scanner
    • 用于在二进制模式文档扫描器中建立阈值水平的方法和装置
    • US5201014A
    • 1993-04-06
    • US835008
    • 1992-02-12
    • Greg A. DegiGraig L. MillerIrene F. Stein
    • Greg A. DegiGraig L. MillerIrene F. Stein
    • H04N1/403
    • H04N1/403
    • In a document scanner that is operating in the binary mode, the magnitude of the signal that is generated for each picture element (PEL) of each document scan line is compared to the magnitude of a threshold signal. Either a binary 0 or a binary 1 is generated as a result of this comparison. The threshold signal magnitude is dynamically established by a method and an apparatus that provides a stored history or histogram of the various signal magnitudes that are generated for each PEL of a plurality of the document scan lines. Since the signal magnitude(s) that is provided by scanning the background, non-image, area of the document occurs the majority of the time within this histogram, the magnitude of this majority signal(s) is used to set the threshold signal magnitude. As a result, the PELS of the document's visible image are converted to a binary electronic image with a minimum loss of visual image content. The threshold signal magnitude is continuously established in this manner during the scanning of a document.
    • 在以二进制模式操作的文档扫描仪中,将每个文档扫描行的每个图像元素(PEL)生成的信号幅度与阈值信号的大小进行比较。 作为该比较的结果,生成二进制0或二进制1。 通过提供为多个文档扫描线的每个PEL生成的各种信号幅度的存储历史或直方图的方法和装置来动态建立阈值信号幅度。 由于通过扫描背景而提供的信号幅度,文档的非图像区域在该直方图的大部分时间内出现,所以多数信号的幅度用于设置阈值信号幅度 。 结果,文件的可见图像的PELS被转换成具有最小的视觉图像内容损失的二进制电子图像。 在扫描文档期间以这种方式连续建立阈值信号幅度。
    • 5. 发明授权
    • Method and apparatus for correcting color registration error
    • 用于校正颜色配准误差的方法和装置
    • US5406066A
    • 1995-04-11
    • US88017
    • 1993-07-06
    • Michael J. SteinleGreg A. Degi
    • Michael J. SteinleGreg A. Degi
    • H04N1/028H04N1/48H01J40/14
    • H04N1/488
    • A photosensor device which comprises a first photosensor array having a first predetermined number of pixels for generating a first data signal indicative of a first color component image of an object which is imaged thereon; a second photosensor array having a second predetermined number of pixels for generating a second data signal indicative of a second color component image of the object which is imaged thereon; and color registration error correction means operatively associated with the photosensor array for correcting color registration error due to a predetermined difference in image size between the first color component image and the second color component image.
    • 一种光传感器装置,其包括具有第一预定数量的像素的第一光传感器阵列,用于产生指示其上成像的物体的第一颜色分量图像的第一数据信号; 第二光传感器阵列,具有第二预定数量的像素,用于产生指示被成像在其上的物体的第二颜色分量图像的第二数据信号; 以及与光传感器阵列可操作地相关联的颜色配准误差校正装置,用于由于第一颜色分量图像和第二颜色分量图像之间的图像尺寸的预定差异来校正颜色配准误差。
    • 7. 发明授权
    • On- the-fly partitionable computer bus for enhanced operation with
varying bus clock frequencies
    • 实时可分割计算机总线,用于增强操作,具有变化的总线时钟频率
    • US5958033A
    • 1999-09-28
    • US910278
    • 1997-08-13
    • Michael SchubertSamuel M. BabbGreg A. Degi
    • Michael SchubertSamuel M. BabbGreg A. Degi
    • G06F13/36G06F1/08G06F13/42G06F13/00G06F13/40H04Q3/52
    • G06F1/08G06F13/4217
    • Method and apparatus for controlling a computer bus having first and second bus slots and operable with a bus controller at first and second data transfer rates. When the computer bus is operating at the first data transfer rate, the bus is partitioned so that the address/data pins of the bus controller are coupled to the address/data pins of both of the first and second bus slots, and the control pins of the bus controller are coupled only to the control pins of the second bus slot. When the computer bus is operating at the second data transfer rate, the bus is partitioned so that the address/data pins of the bus controller are coupled only to the address/data pins of the first bus slot, and the control pins of the bus controller are coupled only to the control pins of the first bus slot. The second data transfer rate may be faster than the first data transfer rate.
    • 用于控制具有第一和第二总线插槽的计算机总线的方法和装置,并且可以以总线控制器在第一和第二数据传输速率下操作。 当计算机总线以第一数据传输速率运行时,总线被分区,使得总线控制器的地址/数据引脚耦合到第一和第二总线插槽的地址/数据引脚,并且控制引脚 总线控制器仅耦合到第二总线插槽的控制引脚。 当计算机总线以第二数据传输速率运行时,总线被分区,使得总线控制器的地址/数据引脚仅耦合到第一总线插槽的地址/数据引脚,总线的控制引脚 控制器仅耦合到第一总线插槽的控制引脚。 第二数据传输速率可能比第一数据传输速率更快。