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1. 发明授权

US6107758A Operation circuit in particular for discharge lamps using discrete time definition values to control operation state switching 失效
标题翻译：操作电路特别适用于放电灯使用离散时间定义值来控制运行状态切换
公开(公告)号：US6107758A
公开(公告)日：2000-08-22
申请号：US404723
申请日：1999-09-23
申请人： Klaus Fischer , Roberto Gariboldi , Giuseppe Cantone
发明人： Klaus Fischer , Roberto Gariboldi , Giuseppe Cantone
IPC分类号： H05B37/02 , H05B41/42
CPC分类号： H05B37/0263 , H05B41/42
摘要： A circuit is described with which an operation circuit for a discharge lamp can be switched between operation states with different lamp currents byhort interruptions of the power supply. Long interruptions than a certain time threshold result in basic state operation.
摘要翻译：描述了一种用于放电灯的操作电路的电路可以通过电源的短暂中断在具有不同灯电流的操作状态之间切换的电路。长时间的中断比一定的时间阈值导致基本的状态操作。

2. 发明授权

US5760628A Circuit and method for generating pulses in response to the edges of an input signal 失效
标题翻译：响应于输入信号的边沿产生脉冲的电路和方法
公开(公告)号：US5760628A
公开(公告)日：1998-06-02
申请号：US657824
申请日：1996-05-31
申请人： Giuseppe Cantone , Aldo Novelli
发明人： Giuseppe Cantone , Aldo Novelli
IPC分类号： H03K5/1532 , H03K5/1252 , H03H11/26
CPC分类号： H03K5/1252
摘要： A pulse generator has an input and two outputs at which to respectively generate pulses in relation to different types of signal edges received at the input of the generator. The generator provides two distinct logic circuit blocks of the sequential type, the blocks being mutually independent for generation of the pulses at the two outputs. In this manner it is possible to easily control the characteristics of the pulses. In addition, if two blocks are connected with appropriate and simple logic networks, it is possible in the generation phase to impose conditions between the pulses at the two outputs in a simple manner and with a certain freedom.
摘要翻译：脉冲发生器具有一个输入端和两个输出端，分别产生与发生器输入端接收的不同类型的信号边沿相关的脉冲。发生器提供了两种不同的顺序类型的逻辑电路块，这些块是相互独立的，用于在两个输出端产生脉冲。以这种方式，可以容易地控制脉冲的特性。另外，如果两个块与适当和简单的逻辑网络连接，则在生成阶段可以以简单的方式并以一定的自由度在两个输出端的脉冲之间施加条件。

3. 发明授权

US6031412A Control of the body voltage of a HV LDMOS 失效
标题翻译：控制HV LDMOS的体电压
公开(公告)号：US6031412A
公开(公告)日：2000-02-29
申请号：US96401
申请日：1998-06-11
申请人： Angelo Genova , Mario Tarantola , Giuseppe Cantone , Roberto Gariboldi
发明人： Angelo Genova , Mario Tarantola , Giuseppe Cantone , Roberto Gariboldi
IPC分类号： H03K17/06 , G05F1/10
CPC分类号： H03K17/063 , H03K2217/0018
摘要： A circuit for charging a capacitance using an LDMOS integrated transistor controlled in a manner to emulate a high voltage charging diode of the capacitance. The circuit avoids the switch-on of parasitic bipolar transistors of the LDMOS structure during transient states. The circuit includes a number of junctions directly biased between a source node and a body node of the LDMOS transistor, a current generator referred to a ground of the circuit, at least one switch between the source and a first junction of a chain of directly biased junctions, and a limiting resistor connected between the body and the current generator referred to ground. The switch is open during a charging phase of the capacitance and is closed when the charging voltage of the capacitance exceeds a preestablished threshold responsive to a control signal. The switch is controlled by a logic signal active during the phase in which the supply voltage of the integrated circuit is lower than the minimum switch-on voltage of the same integrated circuit, for charging the body with a current whose maximum value is limited to a preestablished value.
摘要翻译：使用以模拟电容的高压充电二极管的方式控制的LDMOS集成晶体管对电容进行充电的电路。该电路避免了在瞬态状态期间LDMOS结构的寄生双极晶体管的接通。电路包括直接偏置在LDMOS晶体管的源极节点和体节点之间的多个结，称为电路接地的电流发生器，源极和直接偏置的链的第一结之间的至少一个开关接头和连接在主体和电流发生器之间的限制电阻器是指地面。开关在电容的充电阶段打开，并且当电容的充电电压响应于控制信号超过预先建立的阈值时闭合。开关由在集成电路的电源电压低于同一集成电路的最小接通电压的相位中的逻辑信号控制，用于对电池充电，其电流的最大值被限制为预先确定的价值。

4. 发明授权

US06675360B1 System of management of the trimming of integrated fuses within a scan test architecture 有权
标题翻译：扫描测试架构内整合保险丝修整的管理系统
公开(公告)号：US06675360B1
公开(公告)日：2004-01-06
申请号：US09718078
申请日：2000-11-21
申请人： Giuseppe Cantone , Roberto Cappelletti
发明人： Giuseppe Cantone , Roberto Cappelletti
IPC分类号： G06F1750
CPC分类号： G11C17/18 , G01R31/318572 , G01R31/318583 , G11C17/16
摘要： Functions for simulating, burning and controlling integrated fuses of a device are provided by a dedicated circuit which, instead of differing from other circuits, is integrated by sharing part of the registers with the circuit that normally exists to scan test the integrity of the state of the device. The architecture is simplified and only requires an additional pin as compared to a common scan test circuit.
摘要翻译：用于模拟，燃烧和控制设备的集成保险丝的功能由专用电路提供，该专用电路与其他电路不同，通过将通常存在的电路共享部分寄存器来集成，以扫描测试其状态的完整性装置。与普通扫描测试电路相比，该架构被简化，只需要一个额外的引脚。

5. 发明授权

US06617965B1 Control of the level of the signal produced by a transceiver coupled to a power distribution line 有权
标题翻译：控制由耦合到配电线路的收发器产生的信号的电平
公开(公告)号：US06617965B1
公开(公告)日：2003-09-09
申请号：US09676689
申请日：2000-09-29
申请人： Giuseppe Cantone , Roberto Cappelletti
发明人： Giuseppe Cantone , Roberto Cappelletti
IPC分类号： H04M1104
CPC分类号： H04B3/56 , H04B3/54 , H04B2203/5425 , H04B2203/5483 , H04B2203/5495 , Y10T307/422
摘要： A method for controlling the level of a signal produced by a transceiver of digital data coupled to a power distribution line during a transmission phase is provided. The level of the signal output by the transceiver is regulated by comparing the current level of the output signal with a predetermined minimum threshold and a predetermined maximum threshold, reducing the current level when the maximum threshold is exceeded by reducing the gain, and switching to a voltage mode control of the output signal when the current level of the output signal becomes lower than the minimum threshold.
摘要翻译：提供一种用于在发送阶段期间控制由耦合到配电线路的数字数据的收发器产生的信号电平的方法。通过将输出信号的当前电平与预定的最小阈值和预定的最大阈值进行比较来调节由收发器输出的信号电平，通过减小增益来减小当超过最大阈值时的电流电平，并切换到当输出信号的电流电平变得低于最小阈值时，输出信号的电压模式控制。

6. 发明授权

US6150867A Integrated device for switching systems with filtered reference quantities 有权
标题翻译：具有过滤参考量的交换系统的集成设备
公开(公告)号：US6150867A
公开(公告)日：2000-11-21
申请号：US130694
申请日：1998-08-07
申请人： Angelo Genova , Giuseppe Cantone , Roberto Gariboldi
发明人： Angelo Genova , Giuseppe Cantone , Roberto Gariboldi
IPC分类号： H03K5/08 , G05F3/26 , H03K17/16
CPC分类号： H03K17/162 , G05F3/262
摘要： An integrated device for a switching system is disclosed. The device includes control circuitry for generating at least one switching control signal, reference circuitry for generating at least one reference quantity, a using circuit for using the reference quantity, a circuit for storing the reference quantity, and a switch which, in a first operative condition, connects the reference circuit to the using circuit and to the storage circuit in order to apply the reference quantity thereto. In a second operative condition, the switch disconnects the reference circuit from the using circuit and connects the storage circuit to the using circuit in order to apply the stored reference quantity thereto. Finally, the device includes filtering circuitry for keeping the switch in the second operative condition for a filtering period in accordance with the switching of the control signal.
摘要翻译：公开了一种用于交换系统的集成设备。该装置包括用于产生至少一个切换控制信号的控制电路，用于产生至少一个参考数量的参考电路，用于使用参考量的使用电路，用于存储参考量的电路，以及开关，其在第一操作条件，将参考电路连接到使用电路和存储电路，以便向其施加参考量。在第二操作条件下，开关将参考电路与使用电路断开连接，并将存储电路连接到使用电路，以便将存储的参考数据应用于其中。最后，该设备包括滤波电路，用于根据控制信号的切换将开关保持在第二操作状态，以进行滤波周期。

7. 发明授权

US6075391A Turn-off circuit for an LDMOS in presence of a reverse current 失效
标题翻译：在存在反向电流的情况下，LDMOS的关断电路
公开(公告)号：US6075391A
公开(公告)日：2000-06-13
申请号：US95735
申请日：1998-06-11
申请人： Mario Tarantola , Giuseppe Cantone , Angelo Genova , Roberto Gariboldi
发明人： Mario Tarantola , Giuseppe Cantone , Angelo Genova , Roberto Gariboldi
IPC分类号： H03K17/06 , H03K17/08 , H03K17/687
CPC分类号： H03K17/063 , H03K2217/0018
摘要： A circuit for charging a capacitance using an LDMOS integrated transistor functioning as a source follower and controlled, in a manner to emulate a high voltage charging diode of the capacitance. The LDMOS transistor is controlled via a bootstrap capacitor charged by a diode at the supply voltage of the circuit, and by an inverter driven by a logic control circuit as a function of a Low Gate Drive Signal and of a second logic signal which is active during a phase wherein the supply voltage is lower than the minimum switch-on voltage of the integrated circuit. The circuit uses a first zener diode to charge the bootstrap capacitor and the source of the transistor is connected to the supply node through a second zener diode.
摘要翻译：用于使用用作源极跟随器的LDMOS集成晶体管对电容进行充电的电路，并且以模拟电容的高电压充电二极管的方式被控制。 LDMOS晶体管通过在电路的电源电压下由二极管充电的自举电容器和由作为低栅极驱动信号的函数的逻辑控制电路驱动的反相器以及在第二逻辑信号中被激活的第二逻辑信号来控制其中电源电压低于集成电路的最小接通电压。电路使用第一齐纳二极管对自举电容器充电，晶体管的源极通过第二齐纳二极管连接到电源节点。

8. 发明授权

US6060948A Protection circuit for controlling the gate voltage of a hv LDMOS transistor 失效
标题翻译：用于控制hv LDMOS晶体管的栅极电压的保护电路
公开(公告)号：US6060948A
公开(公告)日：2000-05-09
申请号：US96272
申请日：1998-06-11
申请人： Mario Tarantola , Giuseppe Cantone , Angelo Genova , Roberto Gariboldi
发明人： Mario Tarantola , Giuseppe Cantone , Angelo Genova , Roberto Gariboldi
IPC分类号： H03K17/06 , H03K17/0812 , H03K17/16 , H03K7/162
CPC分类号： H03K17/08122 , H03K17/063
摘要： A circuit for charging a capacitance using an LDMOS integrated transistor functioning as a source follower stage and controlled, in a manner to emulate a high voltage charging diode of the capacitance via a bootstrap capacitor charged by a diode connected to the supply node of the circuit, and by an inverter driven by a logic control circuit as a function of a first Low Gate Drive Signal and of a second logic signal. The second logic signal is active during a phase where the supply voltage is lower than the minimum switch-on voltage of the integrated circuit. The circuit further includes a second inverter functionally referred to the charging node of the bootstrap capacitor and to the voltage of the output node of the inverter. The second inverter has an input coupled to the second logic signal and an output coupled to the gate node of the LDMOS transistor for preventing accidental undue switch-on of the LDMOS transistor.
摘要翻译：一种用于使用用作源极跟随器级的LDMOS集成晶体管对电容进行充电的电路，并且以通过连接到电路的电源节点的二极管充电的自举电容来模拟电容的高电压充电二极管的方式进行控制，以及由逻辑控制电路驱动的逆变器作为第一低栅极驱动信号和第二逻辑信号的函数。第二逻辑信号在电源电压低于集成电路的最小接通电压的阶段有效。电路还包括功能上称为自举电容器的充电节点的第二反相器和逆变器的输出节点的电压。第二反相器具有耦合到第二逻辑信号的输入和耦合到LDMOS晶体管的栅极节点的输出，用于防止LDMOS晶体管的意外过度接通。

9. 发明授权

US08208518B2 Electronic synchronous/asynchronous transceiver device for power line communication networks 有权
标题翻译：用于电力线通信网络的电子同步/异步收发器设备
公开(公告)号：US08208518B2
公开(公告)日：2012-06-26
申请号：US12211731
申请日：2008-09-16
申请人： Roberto Cappelletti , Giuseppe Cantone , Barbara Antonelli , Antonello Castigliola , Alessandro Lasciandare , Vincenzo Marano
发明人： Roberto Cappelletti , Giuseppe Cantone , Barbara Antonelli , Antonello Castigliola , Alessandro Lasciandare , Vincenzo Marano
IPC分类号： H04L5/16 , H04B1/00 , G06F13/12
CPC分类号： H04B3/54 , H04B2203/5416 , H04B2203/5425 , H04B2203/5433 , H04B2203/5458 , H04B2203/5491
摘要： An electronic synchronous/asynchronous transceiver device for power line communication networks is integrated into a single chip and operates from a single supply voltage. The transceiver device includes: at least an internal register that is programmable through a synchronous serial interface; at least a line driver for a two-way network communication over power lines implemented by a single ended power amplifier with direct accessible input and output lines that is part of a tunable active filter for the transmission path; and at least a couple of linear regulators for powering with different voltage levels different kind of external controllers linked to the transceiver device.
摘要翻译：用于电力线通信网络的电子同步/异步收发器装置集成到单个芯片中并且从单个电源电压操作。收发器装置包括：至少一个可通过同步串行接口编程的内部寄存器; 至少一个线性驱动器，用于通过单端功率放大器实现的电力线上的双向网络通信，其具有作为用于传输路径的可调谐有源滤波器的一部分的直接可访问输入和输出线; 以及至少一对线性稳压器，用于为不同电压电源供电，与收发器设备链接的不同种类的外部控制器。

10. 发明申请

US20090074041A1 ELECTRONIC SYNCHRONOUS/ASYNCHRONOUS TRANSCEIVER DEVICE FOR POWER LINE COMMUNICATION NETWORKS 有权
标题翻译：用于电力线通信网络的电子同步/异步收发器装置
公开(公告)号：US20090074041A1
公开(公告)日：2009-03-19
申请号：US12211731
申请日：2008-09-16
申请人： Roberto Cappelletti , Giuseppe Cantone , Barbara Antonelli , Antonello Castigliola , Alessandro Lasciandare , Vincenzo Marano
发明人： Roberto Cappelletti , Giuseppe Cantone , Barbara Antonelli , Antonello Castigliola , Alessandro Lasciandare , Vincenzo Marano
IPC分类号： H04B1/38 , H04L25/49
CPC分类号： H04B3/54 , H04B2203/5416 , H04B2203/5425 , H04B2203/5433 , H04B2203/5458 , H04B2203/5491
摘要： An electronic synchronous/asynchronous transceiver device for power line communication networks is integrated into a single chip and operates from a single supply voltage. The transceiver device includes: at least an internal register that is programmable through a synchronous serial interface; at least a line driver for a two-way network communication over power lines implemented by a single ended power amplifier with direct accessible input and output lines that is part of a tunable active filter for the transmission path; and at least a couple of linear regulators for powering with different voltage levels different kind of external controllers linked to the transceiver device.
摘要翻译：用于电力线通信网络的电子同步/异步收发器装置集成到单个芯片中并且从单个电源电压操作。收发器装置包括：至少一个可通过同步串行接口编程的内部寄存器; 至少一个线性驱动器，用于通过单端功率放大器实现的电力线上的双向网络通信，其具有作为用于传输路径的可调谐有源滤波器的一部分的直接可访问输入和输出线; 以及至少一对线性稳压器，用于为不同电压电源供电，与收发器设备链接的不同种类的外部控制器。

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