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    • 4. 发明授权
    • Interface architecture
    • 接口架构
    • US06745286B2
    • 2004-06-01
    • US10060903
    • 2002-01-29
    • John R. StaubDavid H. BarryGeorge W. PriesterLeonard D. OlsenGregory D. BolstadDanny LamRonald K. Godshalk, Jr.
    • John R. StaubDavid H. BarryGeorge W. PriesterLeonard D. OlsenGregory D. BolstadDanny LamRonald K. Godshalk, Jr.
    • G06F1200
    • G06F11/2097G06F9/5083G06F11/1076G06F11/1471G06F11/2035G06F11/2048G06F17/30067G06F2201/84G06F2211/1028
    • A data interface architecture is described. The data interface architecture includes a network-side interface for communicating with a first bus and a storage-side interface for communicating with a second bus. The data interface architecture further includes a first data cache and a second data cache. The data interface architecture further includes a first parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the first data cache, and a second parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the first data cache. The data interface architecture further includes a third parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the second data cache, and a fourth parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the second data cache. The data interface architecture further includes control logic that is configured to manage the data transactions between the network-side interface and the first data cache, data transactions between the network-side interface and the second data cache, data transactions between the storage-side interface and the first data cache, and data transactions between the storage-side interface and the second data cache.
    • 描述数据接口架构。 数据接口架构包括用于与第一总线通信的网络侧接口和用于与第二总线通信的存储侧接口。 数据接口架构还包括第一数据高速缓存和第二数据高速缓存。 数据接口架构还包括第一奇偶校验引擎,其被配置为对网络侧接口和第一数据高速缓存之间的数据事务执行奇偶校验操作,以及第二奇偶校验引擎,其被配置为执行奇偶校验操作, 存储侧接口和第一数据高速缓存。 数据接口架构还包括第三奇偶校验引擎,其被配置为对网络侧接口和第二数据高速缓存之间的数据事务执行奇偶校验操作,以及第四奇偶校验引擎,其被配置为执行奇偶校验操作, 存储侧接口和第二数据高速缓存。 数据接口架构还包括控制逻辑,其被配置为管理网络侧接口和第一数据高速缓存之间的数据事务,网络侧接口和第二数据高速缓存之间的数据事务,存储侧接口之间的数据事务 和第一数据高速缓存以及存储侧接口和第二数据高速缓存之间的数据事务。