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    • 1. 发明授权
    • Waveform equalization circuit with pulse width modulation
    • 具有脉冲宽度调制的波形均衡电路
    • US08253461B2
    • 2012-08-28
    • US12826648
    • 2010-06-29
    • Fumio YukiHiroki YamashitaKoji Fukuda
    • Fumio YukiHiroki YamashitaKoji Fukuda
    • H03K3/017
    • H04B3/04
    • There is provided a waveform equalization circuit with pulse width modulation that includes pulse-width adjust-level generation circuits PWCLC1a, PWCLC2a, for generating a pulse-width adjust-level VCNT on the basis of preceding input data units Din_P, Din_N, respectively, pulse-width adjustment circuits PWCC1a, PWCC2a, for adjusting a pulse-width according to VCNT, respectively, and a waveform shaping circuit WAC for shaping a waveform of an output signal from each of the pulse-width adjustment circuits. The pulse-width adjustment circuit has a driving power to be controlled according to a consecutive bits count of each of the preceding input data units, and varies transition time of each of output data units Do1_P, Do1_N, thereby adjusting the pulse width. With the use of such a waveform equalization scheme as above, it is possible to attain reduction in power consumption due to simplification in circuit configuration, and further, use of CMOS circuits will enable power consumption to be held back to a low level.
    • 提供具有脉冲宽度调制的波形均衡电路,其包括脉冲宽度调整电平生成电路PWCLC1a,PWCLC2a,用于分别基于先前的输入数据单元Din_P,Din_N产生脉冲宽度调整电平VCNT,脉冲 用于调整根据VCNT的脉冲宽度的宽度调整电路PWCC1a,PWCC2a以及用于整形来自每个脉冲宽度调节电路的输出信号的波形的波形整形电路WAC。 脉冲宽度调整电路具有根据前述各输入数据单元的连续比特数进行控制的驱动功率,并且改变每个输出数据单元Do1_P,Do1_N的转换时间,从而调整脉冲宽度。 通过使用如上所述的这种波形均衡方案,由于电路结构的简化,可以实现功耗的降低,此外,使用CMOS电路将能够将功耗抑制到低水平。
    • 2. 发明申请
    • WAVEFORM EQUALIZATION CIRCUIT WITH PULSE WIDTH MODULATION
    • 波形宽度调制的波形均衡电路
    • US20110001588A1
    • 2011-01-06
    • US12826648
    • 2010-06-29
    • Fumio YUKIHiroki YamashitaKoji Fukuda
    • Fumio YUKIHiroki YamashitaKoji Fukuda
    • H04B3/04
    • H04B3/04
    • There is provided a waveform equalization circuit with pulse width modulation that includes pulse-width adjust-level generation circuits PWCLC1a, PWCLC2a, for generating a pulse-width adjust-level VCNT on the basis of preceding input data units Din_P, Din_N, respectively, pulse-width adjustment circuits PWCC1a, PWCC2a, for adjusting a pulse-width according to VCNT, respectively, and a waveform shaping circuit WAC for shaping a waveform of an output signal from each of the pulse-width adjustment circuits. The pulse-width adjustment circuit has a driving power to be controlled according to a consecutive bits count of each of the preceding input data units, and varies transition time of each of output data units Do1_P, Do1_N, thereby adjusting the pulse width. With the use of such a waveform equalization scheme as above, it is possible to attain reduction in power consumption due to simplification in circuit configuration, and further, use of CMOS circuits will enable power consumption to be held back to a low level.
    • 提供具有脉冲宽度调制的波形均衡电路,其包括脉冲宽度调整电平生成电路PWCLC1a,PWCLC2a,用于分别基于先前的输入数据单元Din_P,Din_N产生脉冲宽度调整电平VCNT,脉冲 用于调整根据VCNT的脉冲宽度的宽度调整电路PWCC1a,PWCC2a以及用于整形来自每个脉冲宽度调节电路的输出信号的波形的波形整形电路WAC。 脉冲宽度调整电路具有根据前述各输入数据单元的连续比特数进行控制的驱动功率,并且改变每个输出数据单元Do1_P,Do1_N的转换时间,从而调整脉冲宽度。 通过使用如上所述的这种波形均衡方案,由于电路结构的简化,可以实现功耗的降低,此外,使用CMOS电路将能够将功耗抑制到低水平。