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1. 发明申请

US20100156471A1 SCALABLE COST FUNCTION GENERATOR AND METHOD THEREOF 有权
标题翻译：可扩展成本函数发生器及其方法
公开(公告)号：US20100156471A1
公开(公告)日：2010-06-24
申请号：US12340307
申请日：2008-12-19
申请人： Frederic Roger
发明人： Frederic Roger
IPC分类号： H02M11/00
CPC分类号： H03F3/45183 , H03F1/3211 , H03F1/3241 , H03F2200/336 , H03F2201/3209
摘要： A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to transform the combined inphase and quadrature output currents into an inphase output voltage and a quadrature output voltage.
摘要翻译：成本函数发生器电路包括各自接收一个或多个输入信号的存储器项，并且每个都提供同相和正交输出电流信号。存储器项的同相和正交输出电流被相加以分别提供组合的同相和正交输出电流。提供互阻抗放大器以将组合的同相和正交输出电流转换为同相输出电压和正交输出电压。

2. 发明申请

US20050062629A1 High-resolution digital-to-analog convertor 失效
标题翻译：高分辨率数模转换器
公开(公告)号：US20050062629A1
公开(公告)日：2005-03-24
申请号：US10493298
申请日：2002-07-18
申请人： Frederic Roger , Ralf-Rainer Schledz
发明人： Frederic Roger , Ralf-Rainer Schledz
IPC分类号： H03M1/68 , H03M1/66
CPC分类号： H03M1/68
摘要： A digital/analog converter apparatus (DAC) comprises, for the purpose of converting a digital input signal (D) into an analog output signal (A), a first unit (F1, F2), two digital/analog converters (DAC1, DAC2) and a second unit (K1, K2), which are connected successively in the stated order. From the digital input signal (D), digital intermediate signals (D1, D2) which are within the analog output signal (A) is obtained through linear combination.
摘要翻译：为了将数字输入信号（D）转换为模拟输出信号（A），数字/模拟转换器装置（DAC）包括第一单元（F1，F2），两个数模转换器（DAC1，DAC2 ）和第二单元（K1，K2），其以所述顺序连续连接。通过数字输入信号（D），通过线性组合获得模拟输出信号（A）内的数字中间信号（D1，D2）。

3. 发明授权

US06617945B2 Filter with an electrically tunable resonator 失效
标题翻译：用电可调谐谐振器滤波
公开(公告)号：US06617945B2
公开(公告)日：2003-09-09
申请号：US09801857
申请日：2001-03-09
申请人： Frederic Roger Lotz , Pierre Jean Monteil , Patrick Albert Georges Desrumaux , Gerard Ernest Emile Forterre
发明人： Frederic Roger Lotz , Pierre Jean Monteil , Patrick Albert Georges Desrumaux , Gerard Ernest Emile Forterre
IPC分类号： H01P704
CPC分类号： H01P7/04
摘要： A filter or multicoupler has at least one resonator which can be electronically tuned by a tuning device, has at least one tuning element such as a tuning capacitor, a switching element for selectively connecting the tuning element electronically to the resonator, and a control device for the switching element. The resonator is a coaxial quarter-wave resonator with a central component having free surface perpendicular to the central axis for mounting of tuning devices.
摘要翻译：滤波器或多重耦合器具有至少一个谐振器，其可以由调谐装置进行电子调谐，具有至少一个调谐元件，例如调谐电容器，用于将调谐元件电连接到谐振器的开关元件，以及用于开关元件。谐振器是同轴四分之一波长谐振器，其中心部件具有垂直于中心轴线的自由表面，用于安装调谐装置。

4. 发明申请

US20130113036A1 Transistor Assembly as an ESD Protection Measure 有权
标题翻译：晶体管组件作为ESD保护措施
公开(公告)号：US20130113036A1
公开(公告)日：2013-05-09
申请号：US13575579
申请日：2011-01-10
申请人： Frederic Roger , Wolfgang Reinprecht
发明人： Frederic Roger , Wolfgang Reinprecht
IPC分类号： H01L27/02
CPC分类号： H01L27/0255 , H01L27/0629 , H01L27/067 , H01L27/0727
摘要： A diode (23) is arranged near a transistor (25) to protect from ESD. The diode comprises a well (5) of a first conductivity type and a doped region (4) of a second conductivity type in opposition to the first conductivity type. The transistor comprises a doped well (2) and a doped region (1) of the first conductivity type. The well (2) of the transistor is doped lower than the well (5) of the diode.
摘要翻译：二极管（23）布置在晶体管（25）附近以防止ESD。二极管包括第一导电类型的阱（5）和与第一导电类型相反的第二导电类型的掺杂区域（4）。晶体管包括掺杂阱（2）和第一导电类型的掺杂区域（1）。晶体管的阱（2）的掺杂比二极管的阱（5）低。

5. 发明授权

US08433745B2 Scalable cost function generator and method thereof 有权
标题翻译：可扩展成本函数发生器及其方法
公开(公告)号：US08433745B2
公开(公告)日：2013-04-30
申请号：US12340307
申请日：2008-12-19
申请人： Frederic Roger
发明人： Frederic Roger
IPC分类号： G06G7/02
CPC分类号： H03F3/45183 , H03F1/3211 , H03F1/3241 , H03F2200/336 , H03F2201/3209
摘要： A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to transform the combined inphase and quadrature output currents into an inphase output voltage and a quadrature output voltage.
摘要翻译：成本函数发生器电路包括各自接收一个或多个输入信号的存储器项，并且每个都提供同相和正交输出电流信号。存储器项的同相和正交输出电流被相加以分别提供组合的同相和正交输出电流。提供互阻抗放大器以将组合的同相和正交输出电流转换为同相输出电压和正交输出电压。

6. 发明授权

US08010075B1 High order harmonics generator 有权
标题翻译：高阶谐波发生器
公开(公告)号：US08010075B1
公开(公告)日：2011-08-30
申请号：US12037455
申请日：2008-02-26
申请人： Frederic Roger
发明人： Frederic Roger
IPC分类号： H04B1/26
CPC分类号： H03F1/3247 , H03F1/3241 , H03F2200/102 , H03F2200/105 , H04B2001/0425
摘要： A high-order harmonics generator includes a plurality of high-pass filters to block out DC signals. In one embodiment, high-pass filters are coupled to the output signals from an envelope detector and a power detector. A high-pass filter can also be coupled to the output of a multiplier that multiplies the filtered envelope signal and the filtered power signal. Additional multipliers may also be used at outputs of multipliers in a cascaded chain of multipliers for higher harmonics generation.
摘要翻译：高次谐波发生器包括多个高通滤波器以阻断DC信号。在一个实施例中，高通滤波器耦合到来自包络检测器和功率检测器的输出信号。高通滤波器也可以耦合到乘法器的输出，乘法器将滤波的包络信号和滤波的功率信号相乘。另外的乘法器也可以用于级联的乘法器链中用于较高次谐波产生的乘法器的输出。

7. 发明授权

US07902901B1 RF squarer 有权
标题翻译： RF平方
公开(公告)号：US07902901B1
公开(公告)日：2011-03-08
申请号：US12340111
申请日：2008-12-19
申请人： Frederic Roger
发明人： Frederic Roger
IPC分类号： G06G7/20
CPC分类号： G06G7/20
摘要： An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.
摘要翻译： RF平方器电路包括第一RF乘法器和第一可变增益跨阻抗放大器（TIA）。第一RF乘法器接收RF输入信号RFIN并提供第一输出电流。第一个TIA接收第一个输出电流作为输入。第一个TIA提供输出电压VOUT。

8. 发明授权

US06967506B2 Circuit arrangement for the discrete-time comparison of signals 有权
标题翻译：用于信号离散时间比较的电路布置
公开(公告)号：US06967506B2
公开(公告)日：2005-11-22
申请号：US10321154
申请日：2002-12-17
申请人： Frederic Roger
发明人： Frederic Roger
IPC分类号： H03K3/356 , H03K5/22
CPC分类号： H03K3/356139
摘要： The invention pertains to a circuit arrangement (comparator) for the discrete-time comparison of input signals (ip, vrefp) and for making available a pair of complementary output levels (vdd, vss) which corresponds to the result of the comparison on a line pair (P, N), wherein said circuit arrangement comprises a reset circuit (12) for balancing the line potentials during a reset phase, an input circuit (14) for generating a potential difference on the line pair (P, N) in accordance with an input signal difference, a first bistable flip-flop (16) for amplifying the generated potential difference and a second bistable flip-flop (20) that is connected by means of a connecting circuit (18) and serves for additionally amplifying the generated potential difference to the desired complementary output levels.According to the invention, a third bistable flip-flop (30a, 30b) is provided that, when connecting the second flip-flop (20) parallel to the first flip-flop (16), amplifies the generated potential difference and thusly reduces the comparison time without significantly impairing the current consumption.
摘要翻译：本发明涉及用于输入信号（ip，vrefp）的离散时间比较的电路装置（比较器），并且用于提供一对互补输出电平（vdd，vss），其对应于一行上的比较结果对（P，N），其中所述电路装置包括用于在复位阶段平衡线电位的复位电路（12），用于根据线对（P，N）产生电位差的输入电路（14）具有输入信号差，用于放大所产生的电位差的第一双稳态触发器（16）和借助于连接电路（18）连接的第二双稳态触发器（20），用于另外放大所产生的与期望的互补输出电平的电位差。根据本发明，提供一种第三双稳态触发器（30a，30b），当与第一触发器（16）并联连接第二触发器（20）时，放大产生的电位差减少比较时间，而不会显着损害电流消耗。

9. 发明授权

US09373614B2 Transistor assembly as an ESD protection measure 有权
标题翻译：晶体管组件作为ESD保护措施
公开(公告)号：US09373614B2
公开(公告)日：2016-06-21
申请号：US13575579
申请日：2011-01-10
申请人： Frederic Roger , Wolfgang Reinprecht
发明人： Frederic Roger , Wolfgang Reinprecht
IPC分类号： H01L27/02 , H01L27/07 , H01L27/06
CPC分类号： H01L27/0255 , H01L27/0629 , H01L27/067 , H01L27/0727
摘要： A diode (23) is arranged near a transistor (25) to protect from ESD. The diode comprises a well (5) of a first conductivity type and a doped region (4) of a second conductivity type in opposition to the first conductivity type. The transistor comprises a doped well (2) and a doped region (1) of the first conductivity type. The well (2) of the transistor is doped lower than the well (5) of the diode.
摘要翻译：二极管（23）布置在晶体管（25）附近以防止ESD。二极管包括第一导电类型的阱（5）和与第一导电类型相反的第二导电类型的掺杂区域（4）。晶体管包括掺杂阱（2）和第一导电类型的掺杂区域（1）。晶体管的阱（2）的掺杂比二极管的阱（5）低。

10. 发明授权

US08525266B2 Semiconductor body having a terminal cell 有权
标题翻译：具有端子电池的半导体体
公开(公告)号：US08525266B2
公开(公告)日：2013-09-03
申请号：US13407575
申请日：2012-02-28
申请人： Wolfgang Reinprecht , Frederic Roger
发明人： Wolfgang Reinprecht , Frederic Roger
IPC分类号： H01L23/62
CPC分类号： H01L27/0266 , H01L27/0207
摘要： A semiconductor body comprising a first connection for feeding an upper supply potential and a first and a second terminal cell, which are situated at a distance from each other. The semiconductor body further comprises an arrester structure, which is arranged between the first and second terminal cells in a p-doped substrate. The arrester structure comprises a first and a second p-channel field-effect transistor structure, each of which is set in a respective n-doped well substantially parallel to the first and second terminal cells, and a diode structure with a p-doped region set in a further n-doped well between the n-doped wells of the first and second p-channel field-effect transistor structures. The diode structure is designed to activate the first and second p-channel field-effect transistor structure as arrester elements during an electrostatic discharge in the semiconductor body.
摘要翻译：一种半导体本体，包括用于馈送上电源的第一连接和位于彼此间隔一定距离的第一和第二端子单元。半导体本体还包括一个放电器结构，它被布置在p掺杂衬底中的第一和第二端子单元之间。避雷器结构包括第一和第二p沟道场效应晶体管结构，其每一个被设置在基本上平行于第一和第二端子单元的相应的n掺杂阱中，以及具有p掺杂区的二极管结构设置在第一和第二p沟道场效应晶体管结构的n个掺杂阱之间的另一n掺杂阱中。二极管结构被设计成在半导体主体中的静电放电期间激活第一和第二p沟道场效应晶体管结构作为避雷器元件。

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