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1. 发明授权

US07126364B2 Interface comprising a thin PCB with protrusions for testing an integrated circuit 有权
标题翻译：接口包括具有用于测试集成电路的突起的薄PCB
公开(公告)号：US07126364B2
公开(公告)日：2006-10-24
申请号：US10527108
申请日：2003-09-04
申请人： Frédéric Jardin-Lemagnen , Emmanuel Savin , Sébastien Leruez
发明人： Frédéric Jardin-Lemagnen , Emmanuel Savin , Sébastien Leruez
IPC分类号： G01R31/02
CPC分类号： G01R1/0408 , G01R1/045 , G01R1/0466 , G01R1/07378
摘要： The invention relates to a test device for testing an integrated circuit called test circuit, comprising a plurality of housings intended to be tested in a printed circuit called main circuit. The device comprises an insulating membrane of soft material having two opposite surfaces covered by two conductive layers interconnected by via holes and intended to be in contact with the test circuit and the main circuit respectively, under the influence of a pressure exerted during the test between the test circuit and the main circuit pressing the test device. Protrusions are arranged on at least one of the two layers in a predefined pattern as a function of said pins, tabs, pads etc. of the test circuit so as to ensure a contact quality between said layer and the circuit (to be tested or the main circuit) having contact with said layer under the influence of said pressing action.
摘要翻译：本发明涉及一种用于测试称为测试电路的集成电路的测试装置，包括多个用于在被称为主电路的印刷电路中测试的外壳。该装置包括一个软质材料的绝缘膜，两个相对的表面被两个导电层覆盖，两个导电层由通孔互连，并分别在测试电路和主电路之间施加的压力测试电路和主电路按下测试设备。作为测试电路的所述引脚，突片，焊盘等的函数，以预定模式将突出部布置在两层中的至少一个上，以确保所述层和电路之间的接触质量（待测试或主电路）在所述按压动作的影响下与所述层接触。

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