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1. 发明授权

US08470645B2 Method for manufacturing an antifuse memory cell 有权
标题翻译：反熔丝存储单元的制造方法
公开(公告)号：US08470645B2
公开(公告)日：2013-06-25
申请号：US13038630
申请日：2011-03-02
申请人： Philippe Candelier , Elise Le Roux
发明人： Philippe Candelier , Elise Le Roux
IPC分类号： H01L21/8246
CPC分类号： H01L27/112 , H01L27/11206
摘要： A method for forming a memory cell including a selection transistor and an antifuse transistor, in a technological process adapted to the manufacturing of a first and of a second types of MOS transistors of different gate thicknesses, this method including the steps of: forming the selection transistor according to the steps of manufacturing of the N-channel transistor of the second type; and forming the antifuse transistor essentially according the steps of manufacturing of the N-channel transistor of the first type, by modifying the following step: instead of performing a P-type implantation in the channel region at the same time as in the N-channel transistors of the first type, performing an N-type implantation in the channel region at the same time as in the P-channel transistors of the first type.
摘要翻译：一种用于形成包括选择晶体管和反熔丝晶体管的存储单元的方法，在适于制造不同栅极厚度的第一和第二类型的MOS晶体管的工艺中，该方法包括以下步骤：形成选择晶体管，根据制造第二类型的N沟道晶体管的步骤; 以及基本上根据制造第一类型的N沟道晶体管的步骤形成反熔丝晶体管，通过修改以下步骤：代替在N沟道中同时在沟道区中进行P型注入第一类型的晶体管，与第一类型的P沟道晶体管同时在沟道区中进行N型注入。

2. 发明申请

US20090250737A1 SECURE MEMORY DEVICE OF THE ONE-TIME PROGRAMMABLE TYPE 审中-公开
标题翻译：一次性可编程类型的安全存储器件
公开(公告)号：US20090250737A1
公开(公告)日：2009-10-08
申请号：US12419921
申请日：2009-04-07
申请人： Philippe Candelier , Philippe Gendrier , Joel Damiens , Elise Le Roux
发明人： Philippe Candelier , Philippe Gendrier , Joel Damiens , Elise Le Roux
IPC分类号： H01L29/94 , H01L29/00
CPC分类号： G11C17/16 , G11C7/24
摘要： The integrated circuit includes a memory device of the irreversibly electrically programmable type. This device includes several memory cells, each memory cell having a dielectric zone positioned between a first electrode and a second electrode. Each memory cell is further associated with an access transistor. At least one first electrically conductive link electrically couples to the first electrodes of at least two memory cells, these first two electrodes being coupled to one and the same bias voltage. The first electrically conductive link is positioned in substantially a same plane as the first electrodes of the two memory cells.
摘要翻译：集成电路包括不可逆电可编程类型的存储器件。该装置包括几个存储单元，每个存储单元具有位于第一电极和第二电极之间的介电区。每个存储单元还与存取晶体管相关联。至少一个第一导电链路电耦合到至少两个存储器单元的第一电极，这些前两个电极耦合到同一偏置电压。第一导电连接件位于与两个存储单元的第一电极基本相同的平面中。

3. 发明申请

US20110223723A1 METHOD FOR MANUFACTURING AN ANTIFUSE MEMORY CELL 有权
标题翻译：用于制造抗细胞记忆细胞的方法
公开(公告)号：US20110223723A1
公开(公告)日：2011-09-15
申请号：US13038630
申请日：2011-03-02
申请人： PHILIPPE CANDELIER , Elise Le Roux
发明人： PHILIPPE CANDELIER , Elise Le Roux
IPC分类号： H01L21/8246
CPC分类号： H01L27/112 , H01L27/11206
摘要： A method for forming a memory cell including a selection transistor and an antifuse transistor, in a technological process adapted to the manufacturing of a first and of a second types of MOS transistors of different gate thicknesses, this method including the steps of: forming the selection transistor according to the steps of manufacturing of the N-channel transistor of the second type; and forming the antifuse transistor essentially according the steps of manufacturing of the N-channel transistor of the first type, by modifying the following step: instead of performing a P-type implantation in the channel region at the same time as in the N-channel transistors of the first type, performing an N-type implantation in the channel region at the same time as in the P-channel transistors of the first type.
摘要翻译：一种用于形成包括选择晶体管和反熔丝晶体管的存储单元的方法，在适于制造不同栅极厚度的第一和第二类型的MOS晶体管的工艺中，该方法包括以下步骤：形成选择晶体管，根据制造第二类型的N沟道晶体管的步骤; 以及基本上根据制造第一类型的N沟道晶体管的步骤形成反熔丝晶体管，通过修改以下步骤：代替在N沟道中同时在沟道区中进行P型注入第一类型的晶体管，与第一类型的P沟道晶体管同时在沟道区中进行N型注入。

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